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Posted 6mo ago

Digital Design Engineer

@ MediaTek
Cairo, Egypt
OnsiteFull Time
Responsibilities:designing RTL, integrating PHY, collaborating teams
Requirements Summary:Bachelor's in electrical/communication/computer engineering, experience in RTL design and PHY IP development, familiarity with front-end/back-end integration and EDA tools, knowledge of high-speed interfaces, strong debugging and communication skills.
Technical Tools Mentioned:EDA tools, RTL
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Job Description

Job Description

Mediatek Egypt is seeking a skilled and motivated Digital Design to join our high-performance team focusing on SerDes and high-speed interface IP development. The successful candidate will be responsible for the architecture, RTL design, and integration of PHY IP blocks, collaborating with cross-functional teams to ensure high-quality and robust IP solutions for cutting-edge SoCs.

Key Responsibilities:

RTL Design & Coding: Develop and implement RTL code for PHY IPs with a focus on performance, power efficiency, and silicon area optimization.

Front-end and Back-end Integration: Handle the integration of PHY IPs in both front-end and back-end design flows, ensuring seamless connectivity and function within the SoC.

Cross-functional Collaboration:
Work closely with MAC design and Design Verification (DV) teams for system-level IP verification.

Collaborate with analog design teams for PHY/SerDes co-simulation and mixed-signal integration.

Main Requirements and Qualifications

  1. Required Qualifications:
  2. Bachelor's degree in communication and Electronics Engineering, Computer Engineering
  3. Experience in RTL design for digital circuits
  4. Familiarity with front-end and back-end integration flows, as well as EDA tools.
  5. Practical experience in PHY IP development for high-speed interfaces is preferred.
  6. Preferred Skills:
  7. Problem-solving and debugging abilities.
  8. Effective teamwork skills.
  9. Excellent communication and documentation capabilities.
  10. Required Qualifications:
  11. Bachelor's degree in communication and Electronics Engineering, Computer Engineering
  12. Proficiency in RTL design for digital circuits
  13. Familiarity with front-end and back-end integration flows, as well as EDA tools.
  14. Practical experience in PHY IP development for high-speed interfaces
  15. A solid understanding of high-speed interface standards, including Ethernet SerDes, PCIe, USB, HDMI, DP, MPHY, and CPHY.
  16. Knowledge of DSP-based IP design techniques, such as CDR, CTLE, FEC, FIR, and IIR is preferred.
  17. Preferred Skills:
  18. Strong problem-solving and debugging abilities.
  19. Effective teamwork skills.
  20. Excellent communication and documentation capabilities.
  21. #LI-AK1