Job Description
About the Project:
Backed by a $5M Central Gap Fund grant, our research group at the National University of Singapore (NUS) is commercializing a breakthrough Ultralow-K (ULK) Monolayer Amorphous Carbon (MAC) dielectric technology. Having successfully validated the core materials physics at the lab scale, we are now solving critical reactor scaling challenges to transition our UV-CVD prototype into a scalable 200mm/300mm commercial alpha tool. This technology solves the critical interconnect RC-delay bottleneck in sub-3nm advanced CMOS nodes and has already secured strong evaluation traction from top-tier global semiconductor and equipment manufacturers.
The Opportunity:
Are you a highly skilled systems integrator or NPI engineer looking to step away from standard fab shift rotations and rigid OEM maintenance routines?
We are seeking a true "Tool Builder" to act as our Lead Equipment Engineer and drive the commercial scale-up of our proprietary hardware.
This role offers a highly competitive base salary and a standard 5-day work week. More importantly, this is a foundational role: successful execution over the 2-year grant period offers a direct pathway to transition into a planned deep-tech spin-off as a core engineering leader. You will bring industry-standard engineering discipline to our academic research team, gaining the rare opportunity to engineer a first-of-its-kind semiconductor manufacturing tool that will directly impact the global sub-3nm interconnect roadmap.
Key Responsibilities:
• Commercial Scale-up: Lead the mechanical and systems design transition from our current 100mm R&D chamber to an industry-compatible 200mm/300mm advanced dielectric deposition alpha tool.
• Hardware/Software Integration: Develop robust control systems for high-vacuum environments, reactor gas dynamics and distribution, precision thermal management, and high-voltage/RF power delivery modules. Program data acquisition and automated control loops, integrating complex hardware via RS-232, Modbus, DAQ cards, and exploring industrial protocols as we scale.
• Technical Ownership & Collaborative Engineering: Work closely alongside our core R&D scientific team to solve fundamental reactor physics bottlenecks. Translate complex process phenomena (e.g., localized thermal gradients, window degradation, laminar gas curtains) into robust, repeatable commercial hardware architectures.
• Process Hardware Optimization: Troubleshoot and optimize high-vacuum subsystems, reactor gas dynamics (e.g., mitigating thermal convection, optimizing gas curtains and showerhead design), and advanced UV/ionization source integration to enable <5% wafer-scale uniformity.
• Engineering Discipline: Enforce industry-standard methodologies across the lab for tool qualification, system schematics, baseline testing, and design of experiments (DOE). Leverage industry networks to rapidly source specialized vacuum hardware.
Qualifications
Qualifications / Discipline:
Bachelor’s or Master's degree in Mechanical Engineering, Electrical Engineering, Materials Science, Physics, or a related engineering discipline.
Skills:
• Deep, hands-on expertise in high-vacuum physics, reactor gas dynamics (e.g., complex MFC arrays, showerhead design), and advanced deposition tool architecture (CVD/PVD/ALD).
• Strong hardware-software integration experience preferably using Python. Proven ability to interface with hardware modules via analog/digital DAQ systems, RS-232, Modbus, or industrial protocols. (Note: PLC programming is beneficial but not strictly required for this alpha-phase role).
• A proven "builder" mindset. You must be comfortable working beyond standard OEM manuals, engineering custom hardware modifications, and rapidly prototyping solutions to complex process bottlenecks.
• Excellent cross-functional collaboration skills, with the ability to bridge the gap between academic materials science and rigorous commercial engineering standards.
• Bonus: Background in advanced carbon coatings, or experience scaling up alpha/beta tools within hardware startups.
Experience:
5-8 years of hands-on experience in the semiconductor equipment industry, specifically in thin-film tool R&D (e.g., Applied Materials, Lam Research, ASM, TEL) or New Product Introduction (NPI). Demonstrated expertise in tool qualification methodologies, baseline system testing, and Design of Experiments (DOE) is essential. You bring the commercial scale-up mindset and rigorous engineering discipline that academia typically lacks.
