10 analog engineer jobs at 5 companies in Colfax, CA
1mo
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Analog Design Engineer
Rancho Cordova, California, United States
$121k-$194k/yr HybridFull Time
5+ YOE5+ years experience with a bachelor's in Electrical Engineering (or equivalent); strong analog/mixed-signal design, post-layout simulation and silicon debug; proficiency with Cadence Virtuoso, Spectre, HSPICE, PrimeSim.
Cadence Virtuoso, Spectre, HSPICE, PrimeSim
1w
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Analog Circuit Design Engineer
Santa Clara or Folsom
$122k-$232k/yr HybridFull Time
2+ YOEDegree in EE/CE with 2–3+ years VLSI analog design experience, familiarity with Synopsys and Cadence, small-signal analysis, high-speed IO and power delivery concepts, Matlab and scripting, and strong collaboration and documentation skills.
Synopsys, Cadence, Matlab, VS Code, Python, GitHub Copilot, oscilloscopes, signal generators
3mo
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SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)
Boise or Folsom or Richardson or San Jose
$159k-$347k/yr OnsiteFull Time
10+ YOEBS/MS/PhD in EE; 10+ years analog/mixed-signal IC design with tape-out; deep clocking (PLL/DLL/CDR) expertise; transistor-level simulation with HSpice; strong jitter analysis and analog-digital interface experience.
HSpice, Verilog-AMS, Real-number modeling (RNM)
5d
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Electronics Engineer II
Rancho Cordova, California, United States
$80k-$85k/yr OnsiteFull Time
5+ YOEBachelor's degree in electronic engineering with 5+ years of engineering experience, or associate degree with 9+ years. Requires PCB design, electronic testing, troubleshooting, analog/digital/embedded design, and communication skills.
PCAD, Altium, AutoCAD, VHDL, PCB, oscilloscope, DVM, Logic analyzers
3mo
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422
1w
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Staff Design and Verification Engineer, Pathfinding
Folsom or Boise or San Jose
$116k-$246k/yr OnsiteFull Time
4+ YOE4+ years verification experience in digital/analog/mixed-signal, expertise in Verilog, FastSpice, co-simulation, SPICE, UNIX and Cadence; strong circuit and semiconductor physics knowledge and problem-solving skills.
Verilog, FastSpice, UNIX, Cadence, SPICE
1w
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Staff Design and Verification Engineer, Pathfinding
Folsom or Boise or San Jose
$116k-$246k/yr OnsiteFull Time
4+ YOE4+ years verification experience in digital/analog/mixed-signal; expertise in Verilog, SPICE/FastSpice, co-simulation, real-number modeling; proficiency with UNIX and Cadence; BS/MS/PhD in electrical or related field or equivalent experience.
Verilog, FastSpice, SPICE, UNIX, Cadence, Artificial Intelligence (AI)
2w
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Principal SerDes Architect
Santa Clara or Hillsboro or Folsom or Phoenix
$221k-$312k/yr HybridFull Time
10+ YOEBachelor's in EE/CE with 12+ years (or Master's with 10+ years) in analog circuit design; deep SerDes and I/O PHY expertise; analog modeling, simulation, optimization; UCIe/PCIe familiarity; technical leadership and mentoring.
UCIe, PCIe, SerDes
2mo
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Staff/Principal Layout Designer, AI-Optimized Memory
Richardson or Folsom
$62-$122/hr OnsiteFull Time
Bachelor's or Master's in CS/CE/EE (or equivalent), extensive DRAM layout experience, proficiency with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS, and strong analog/mixed-signal layout fundamentals.
Cadence VLE/VXL, Mentor Graphics Calibre DRC/LVS
2mo
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Staff/Principal Layout Designer, AI-Optimized Memory
Richardson or Folsom
$62-$122/hr OnsiteFull Time
Bachelor's or Master's in CS/CE/EE (or equivalent experience); extensive DRAM layout experience; experience with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS; strong analog/layout fundamentals and understanding of speed, power, capacitance, and area impacts.
Cadence VLE, Cadence VXL, Mentor Graphics Calibre DRC, Mentor Graphics Calibre LVS