14 analog engineer jobs at 8 companies in Dixon, CA
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Analog Design Engineer
Rancho Cordova, California, United States
$121k-$194k/yr HybridFull Time
5+ YOE5+ years experience with a bachelor's in Electrical Engineering (or equivalent); strong analog/mixed-signal design, post-layout simulation and silicon debug; proficiency with Cadence Virtuoso, Spectre, HSPICE, PrimeSim.
Cadence Virtuoso, Spectre, HSPICE, PrimeSim
2w
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Principal Analog Hardware Engineer
Santa Rosa, California, United States
$139k-$232k/yr HybridFull Time
8+ YOEB.S. in EE/CE or related,8+ years analog/mixed-signal hardware design (5+ with advanced degree),proficiency with lab equipment and industry tools,ability to lead architecture and mentor engineers.
SPICE, Cadence, Mathcad, HyperLynx, ADS, Mentor Graphics, oscilloscopes, spectrum analyzers, signal generators, DMMs, SMUs, automated test frameworks, VNA, vector signal generators, Python, C, MATLAB, LabVIEW, Verilog, VHDL
2w
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Analog Circuit Design Engineer
Santa Clara or Folsom
$122k-$232k/yr HybridFull Time
2+ YOEDegree in EE/CE with 2–3+ years VLSI analog design experience, familiarity with Synopsys and Cadence, small-signal analysis, high-speed IO and power delivery concepts, Matlab and scripting, and strong collaboration and documentation skills.
Synopsys, Cadence, Matlab, VS Code, Python, GitHub Copilot, oscilloscopes, signal generators
3mo
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SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)
Boise or Folsom or Richardson or San Jose
$159k-$347k/yr OnsiteFull Time
10+ YOEBS/MS/PhD in EE; 10+ years analog/mixed-signal IC design with tape-out; deep clocking (PLL/DLL/CDR) expertise; transistor-level simulation with HSpice; strong jitter analysis and analog-digital interface experience.
HSpice, Verilog-AMS, Real-number modeling (RNM)
6d
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Electronics Engineer II
Rancho Cordova, California, United States
$80k-$85k/yr OnsiteFull Time
5+ YOEBachelor's degree in electronic engineering with 5+ years of engineering experience, or associate degree with 9+ years. Requires PCB design, electronic testing, troubleshooting, analog/digital/embedded design, and communication skills.
PCAD, Altium, AutoCAD, VHDL, PCB, oscilloscope, DVM, Logic analyzers
3mo
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422
1d
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Staff Layout Design Engineer
Raleigh or Sacramento or Tallahassee or Denver or Austin
$144k-$188k/yr OnsiteFull Time
10+ YOEAssociate degree in electronic or IC layout CAD or related field and 10+ years of IC layout experience. Requires analog layout, floorplanning, Cadence and Mentor tools, LVS troubleshooting, and teamwork skills.
Cadence Virtuoso XL, Mentor Calibre, Cadence, Mentor, CMOS, SOI, PDK, LVS
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In-Fab Wafer Test Engineer
Santa Rosa, California, United States
$93k-$155k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering (or equivalent) with 2+ years testing/troubleshooting RF, analog, and digital circuits; microwave and semiconductor device knowledge; experience with electrical test instrumentation; strong communication and problem-solving skills.
C#, .NET, Visual Studio, SPECS Test Framework
1mo
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In-Fab Wafer Test Engineer
Santa Rosa, California, United States
$93k-$155k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering or equivalent,2+ years testing RF/analog/digital circuits,knowledge of microwave and semiconductor device processing,experience with electrical test instrumentation and automated test,strong problem solving and communication.
C#, .NET, Visual Studio, SPECS Test Framework
2w
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Principal SerDes Architect
Santa Clara or Hillsboro or Folsom or Phoenix
$221k-$312k/yr HybridFull Time
10+ YOEBachelor's in EE/CE with 12+ years (or Master's with 10+ years) in analog circuit design; deep SerDes and I/O PHY expertise; analog modeling, simulation, optimization; UCIe/PCIe familiarity; technical leadership and mentoring.
UCIe, PCIe, SerDes
2mo
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Staff/Principal Layout Designer, AI-Optimized Memory
Richardson or Folsom
$62-$122/hr OnsiteFull Time
Bachelor's or Master's in CS/CE/EE (or equivalent), extensive DRAM layout experience, proficiency with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS, and strong analog/mixed-signal layout fundamentals.
Cadence VLE/VXL, Mentor Graphics Calibre DRC/LVS
2mo
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Staff/Principal Layout Designer, AI-Optimized Memory
Richardson or Folsom
$62-$122/hr OnsiteFull Time
Bachelor's or Master's in CS/CE/EE (or equivalent experience); extensive DRAM layout experience; experience with Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS; strong analog/layout fundamentals and understanding of speed, power, capacitance, and area impacts.
Cadence VLE, Cadence VXL, Mentor Graphics Calibre DRC, Mentor Graphics Calibre LVS
2mo
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R&D Engineering Support
Santa Rosa, California, United States
$84k-$141k/yr OnsiteFull Time
1+ YOE1+ years technical experience; AA/AS in electronics or equivalent; RF/Microwave test experience; schematics, analog/digital circuit theory, soldering; VEE programming; proficiency with Microsoft Office, Visio, and Visual Studio.
Microsoft Excel, Microsoft Word, Microsoft PowerPoint, Microsoft Visio, Microsoft Access, Microsoft Outlook, Microsoft Visual Studio, VEE
2mo
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R&D Engineering Support
Santa Rosa, California, United States
$84k-$141k/yr OnsiteFull Time
15+ YOE15+ years technical experience, AA/AS in electronics or equivalent, RF/Microwave test experience, schematic reading, analog/digital circuit knowledge, soldering, VEE programming, Microsoft Office proficiency, strong troubleshooting skills.
VEE, Microsoft Excel, Microsoft Word, Microsoft PowerPoint, VISIO, Microsoft Access, Microsoft Outlook, Microsoft Visual Studio