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Assoc Test Engineer
Cedar Park, Texas, United States
$80k-$90k/yr OnsiteFull Time
0.5+ YOEB.S. in Electrical Engineering required; 6–12 months analog design or test engineering experience; knowledge of schematic capture, PCB layout, ATE programming, and object-oriented programming.
Microsoft Windows, Altium, C, C++, Python, Java, GPIB, LXI (TCP/IP), USB, Serial
2mo
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Senior Electrical Engineer- FPGA Development
Round Rock, Texas, United States
$110k-$151k/yr OnsiteFull Time
6+ YOE6+ years in product development from concept through production; strong PCBA, HDL/RTL knowledge, Verilog/SystemVerilog; analog/digital design; holds hardware/software interaction expertise.
Verilog, SystemVerilog, HDL, Python, Git, Lattice, Xilinx, Altera, Synopsys VCS
2w
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Electrical Principal Engineer- FPGA Development
Round Rock, Texas, United States
$145k-$187k/yr OnsiteFull Time
10+ YOE10+ years industry experience with product development from concept to production; advanced PCBA and HDL (Verilog/System Verilog) skills; RTL design and simulation; analog and digital design fundamentals; hardware/software interaction knowledge.
Verilog, System Verilog, HDL, RTL, Lattice, Xilinx, Altera, Synopsys VCS, Python, Batch, Git
3w
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Senior Principal Electrical Engineer - FPGA Development
Round Rock, Texas, United States
$174k-$226k/yr OnsiteFull Time
12+ YOE12+ years product development experience; advanced FPGA technologies, Verilog/SystemVerilog and HDL coding; RTL design and simulation; strong analog and digital fundamentals; hardware-software integration. Toolchain experience (Lattice/Xilinx/Altera, Synopsys VCS), Python and Git preferred.
Verilog, SystemVerilog, HDL, RTL, Lattice, Xilinx, Altera, Synopsys VCS, Python, Batch, Git