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Physical Design Intern
San Jose, California, United States
$35-$45/hr OnsiteInternship
Currently pursuing a BS/MS in EE/CE or related field; foundational VLSI and ASIC physical design knowledge; scripting experience (Python, Perl, TCL); familiarity with ASIC flow and strong analytical/problem-solving skills.
Python, Perl, TCL, Synopsys ICC2, Cadence Innovus, PrimeTime, Tempus, LEF/DEF, UPF/CPF, GPT, Copilot
3mo
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DFT Intern
San Jose, California, United States
OnsiteInternship, Full Time
Pursuing Bachelor's, Master's, or PhD in EE/CE or related field; familiarity with Verilog/SystemVerilog; exposure to ASIC/SoC concepts; digital logic; ASIC design flow; scripting in Python/Tcl; interest in transformers/AI.
Verilog, SystemVerilog, Python, Tcl, DFT Tools, Tessent
1mo
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FPGA Engineer Intern (Summer 2027 - Chicago)
Chicago, Illinois, United States
$80k/yr OnsiteInternship
Student in computer/electrical engineering or related field on track to graduate Dec 2027–Jun 2028; hands-on FPGA/ASIC digital design experience; VHDL/Verilog/System Verilog experience; strong engineering instincts and collaboration skills.
FPGA, ASIC, VHDL, Verilog, System Verilog
18h
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FPGA Engineer Intern (Summer 2027 - Austin)
Austin or Chicago
OnsiteInternship
Student in Computer/Electrical Engineering (BS/MS/PhD) graduating Dec 2027–Jun 2028; hands-on FPGA/ASIC digital design experience; VHDL/Verilog/System Verilog experience; strong engineering instincts and teamwork skills.
FPGAs, ASICs, VHDL, Verilog, System Verilog