52 compiler engineer jobs at 18 companies in Jarrell, TX

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Compiler Toolchain Engineer
Austin, Texas, United States
$99k-$148k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
5+ YOE5+ years compiler engineering experience, proficiency with LLVM or gcc, programming in C/C++ and assembly, knowledge of instruction set and system tools, and a bachelor’s degree in CS or related field.
LLVM, gcc, C, C++, assembly, assembler, linker, debugger, Android, Hexagon DSP
2mo
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Senior Compiler Engineer - AI
Austin or Texas or California or Santa Clara or Redmond
$184k-$288k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
8+ YOEBS/MS/PhD or equivalent experience in CS or related field; 8+ years software engineering and AI/ML experience; strong compiler, code-generation, and GPU architecture knowledge; proficiency in Python and C/C++; LLVM/MLIR and LLM integration experience.
Python, C, C++, LLVM, MLIR, LLM
2w
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Senior Compiler Engineer – Rust GPU
Santa Clara or Austin or Seattle or United States
$152k-$242k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOE5+ years compiler or GPU codegen experience, deep Rust and compiler internals knowledge, expertise with LLVM/MLIR/PTX/CUDA, strong parallel programming and software design skills.
Rust, rustc, Cargo, CUDA, PTX, MLIR, LLVM
1mo
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AI Compiler Engineer
Austin, Texas, United States
OnsiteFull Time
Ericsson
EricssonNasdaq Stockholm: ERIC B: Global provider of telecommunications equipment and services.
Expertise in MLIR/compiler architecture, production C++ and LLVM, lowering from JAX/StableHLO, concurrency and memory modeling for bare-metal silicon; strong correctness and performance focus.
MLIR, JAX, StableHLO, C++, TableGen, LLVM, CUDA
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Principal AI Compiler Engineer
Austin or San Jose or San Diego
OnsiteFull Time
NXP Semiconductors
NXP SemiconductorsNASDAQ: NXPI: Designs and manufactures semiconductors for automotive and IoT applications.
MS/PhD in CS/EE or equivalent; deep AI compiler experience; graph optimization; MLIR/LLVM/TVM; C/C++ and Python; AI workloads; Scrum experience.
MLIR, LLVM, TVM, PyTorch, TensorFlow, ONNX, C++, Python, CUDA
2mo
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Member of Technical Staff, Hardware, Compiler Engineer
Palo Alto or Austin
$200k-$420k/yr OnsiteFull Time
River AI
River AI: Building user-controlled, personalized AI with integrated local hardware.
5+ YOEBachelor's in EE/CE and 5+ years experience with advanced process nodes; deep experience with MLIR/XLA and PyTorch internals; strong C/C++ skills and computer architecture knowledge.
PyTorch, MLIR, XLA, LLVM, Triton, CUDA, C, C++
3mo
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Senior Staff Engineer - AI Compiler (784666)
Austin, Texas, United States
OnsiteFull Time
Ericsson
EricssonNasdaq: ERIC: Manufactures telecommunications equipment and provides networking services.
5+ YOESenior AI compiler engineer with MLIR, LLVM, and C++ experience; greenfield MLIR dialects; hardware-specific IR lowering; memory modeling; production-grade compiler work.
MLIR, TableGen, LLVM, C++, JAX, StableHLO
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Staff DevOps Engineer - Compiler Infrastructure
Austin, Texas, United States
$152k-$228k/yr HybridFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
Bachelor's degree required; master's preferred in a relevant engineering or computer science field. Requires Linux/Unix, Bash, Python, C/C++, CI/CD, containerization, and build automation expertise.
Jenkins, GitHub Actions, Buildbot, Docker, Kubernetes, CMake, Ninja, Linux, Unix, Bash, Python, C, C++, LLVM
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Software Engineer II: AI Compiler Engineer
Austin, Texas, United States
HybridFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
3+ YOEBachelor's in CS/CE or equivalent, 3+ years C/C++ experience, Linux/Windows development, experience with LLVM/MLIR and compiler optimization techniques; Python and deep-learning framework experience preferred.
PyTorch, TensorFlow, Caffe, LLVM, MLIR, C, C++, Linux, Windows, Python, Glow, TVM, XLA, ONNX, NNEF, Xtensa, DSP, DMA
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FPGA Engineer Engineer (eInfochips)
San Jose or Austin
OnsiteFull Time
Arrow Electronics
Arrow ElectronicsNYSE: ARW: Distributes electronic components and enterprise computing solutions globally.
9+ YOE9+ years experience; proficient in Verilog/System Verilog, EDA tools (VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus), IPXACT, UPF, PCIe/AXI/APB, ARM fabric; scripting with Python/Tcl/Perl; timing signoff and clock-crossing expertise.
Verilog, System Verilog, Python, Tcl, Perl, VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus, IPXACT, UPF
1w
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Intern - Design Verification Infrastructure Engineer - Platform
Santa Clara or Austin or Berkeley or Boston
OnsiteFull Time
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
Software engineering experience with a compiled and a scripting language, modern engineering practices, production deployments; familiarity with Chisel/CIRCT/MLIR and EDA flows preferred.
Chisel, CIRCT, MLIR, Scala, Python
2w
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Firmware Engineer
Austin, Texas, United States
$125k-$150k/yr OnsiteFull Time
Neurophos
Neurophos: Develops high-performance photonic processors for AI inference acceleration.
3+ YOEBachelor's in CS/ECE or related,3–5 years firmware/embedded experience,expert in embedded C++,Python,hardware interfaces,RTOS,register-level programming,cross-compilation and debugging for embedded processors.
Embedded C++, Python, Assembly, I2C, SPI, UART, PCIe, Ethernet, ARM Cortex-M, ARM Cortex-A, RISC-V, Verilog, SystemVerilog, ModelSim, Questasim, Jenkins, GitHub Actions, GitLab CI, CMake, Git, Docker, GDB, JTAG debuggers, logic analyzers, oscilloscopes, protocol analyzers, FreeRTOS, Zephyr, Posix/Linux
1mo
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Senior Analog Circuit Design Engineer
Austin or San Diego
$160k-$227k/yr OnsiteFull Time
MediaTek
MediaTekTaiwan Stock Exchange: 2454: Designs and develops system-on-chip solutions for electronic devices.
5+ YOEMS/PhD in engineering or CS, 5+ years analog/mixed-signal design (data converters, LDO/PMIC), Cadence and scripting proficiency, transistor-level analysis and silicon validation experience.
Cadence Virtuoso, Custom Compiler, Spectre, AMS, Matlab, Simulink, Tcl, Perl, Python, SKILL, shell script
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DFT Engineer (CE-64000920)
Austin or Chandler or Greensboro
HybridFull Time
Cirrus Logic
Cirrus LogicNASDAQ: CRUS: Designs mixed-signal integrated circuits for consumer electronics.
2+ YOEMSEE with 2+ years or BS with relevant experience; hands-on ASIC DFT design and verification; experience with FastScan, TestKompress, TetraMAX, Test Compiler; MBIST, scan/ATPG, Verilog/SystemVerilog/VHDL; scripting (Perl, Python, TCL); strong communication.
FastScan, TestKompress, TetraMAX, Test Compiler, Verilog, SystemVerilog, VHDL, Perl, Python, TCL
2mo
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Senior Software Engineer
Austin, Texas, United States
RemoteFull Time
MNTN
MNTNNYSE: MNTN: Self-serve platform for Connected TV and performance advertising.
5+ YOE5+ years backend engineering in SaaS with large data; distributed microservices; compiled language experience (Golang preferred); scalable messaging systems; strong CS fundamentals; Postgres experience; observability; clear communicator.
Go, Kubernetes, PostgreSQL, Google Cloud Platform, Pub/Sub, BigQuery, Kafka, REST
2w
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Principal Engineer - Analog and Mixed-Signal Physical Design
Austin or Hillsboro or Raleigh or Mountain View or Redmond
$143k-$275k/yr HybridFull Time
Microsoft
MicrosoftNASDAQ: MSFT: Develops software, services, devices, and cloud computing solutions.
3+ YOEHands-on analog and mixed-signal physical implementation experience, timing closure and physical verification expertise, Fusion Compiler/PrimeTime/Virtuoso familiarity, and eligibility to pass Microsoft Cloud Background Check and export-control screening.
Fusion Compiler, PrimeTime, Virtuoso
2w
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Software Engineer, Metal Runtime (API & Abstractions)
Austin or Santa Clara or Toronto
$100k-$500k/yr HybridFull Time
Tenstorrent
Tenstorrent: Designs and manufactures AI processors and RISC-V CPU solutions.
Strong C/C++ low-level systems programming, concurrency and performance experience; API and abstraction design; collaboration with runtime, kernel, compiler teams.
C, C++
2mo
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Software Engineer, ASIC
Austin or South San Francisco
$123k-$216k/yr OnsiteFull Time
Neuralink
Neuralink: Developing implantable brain-computer interfaces to restore human capabilities.
Bachelor's degree in computer science or related field; experience with EDA compute environments; proficiency in Rust/Go/C++; Linux storage and datacenter systems; multi-cloud/hybrid deployments; embedded cross-compilation toolchains.
Rust, Python, Go, Cadence, Terraform, Ansible, Packer, MAAS, Bazel, Nix, Prometheus, ClickHouse, Grafana, Ray, Docker, Kubernetes, AWS, OCI, RHEL, Ubuntu
3w
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Senior AI Software Engineer - Neuromorphic Computing
Hillsboro or Santa Clara or Austin
$150k-$276k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
3+ YOEBachelor's in a STEM field,3+ years building AI compiler/runtime or systems software,production experience in Python and C/C++,experience with AI frameworks and tooling (ONNX,TVM,MLIR,XLA),strong systems and performance skills.
ONNX, IREE, OpenVINO, TVM, MLIR, XLA, Python, C/C++, PyTorch, JAX, TensorFlow, ROS2, CUDA, LLVM, OneAPI, OpenCL, SYCL
2mo
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DFT Tech Lead
Austin, Texas, United States
OnsiteFull Time
Retym
Retym: Developing coherent DSP silicon for AI data center infrastructure.
8+ YOE8+ years DFT experience with specification, insertion, silicon bring-up, ATPG/MBIST/JTAG debugging, fault modeling; EDA tool experience (Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, TestKompress); master's preferred.
Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, TestKompress, ATPG, MBIST, JTAG, ATE