1mo
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Senior FW Engineer - Pathfinding
Sacramento, California, United States
$140k-$223k/yr OnsiteFull Time
7+ YOE7+ years embedded firmware development with C/C++ in RTOS environments, experience with compilers/debuggers/toolchains, Python and Linux scripting preferred; BS/MS in CS/CE or equivalent experience.
C, C++, Python, Linux, Git, RTOS, compilers, debuggers, emulators, toolchains, PCIe, NVMe, Enet, FC, IB
2mo
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DMTS Digital Design Engineer / Chip Lead
Minneapolis or Boise or Folsom or Richardson or San Jose
$206k-$410k/yr OnsiteFull Time
10+ YOE10+ years ASIC/digital design experience with prior tape-out; BS/MS/PhD in EE/CE or related; expert SystemVerilog; synthesis (Design Compiler/Genus), static timing analysis (PrimeTime/Tempus), RTL simulation (VCS/Xcelium), CDC tools; chip architecture and IP integration experience.
SystemVerilog, Synopsys Design Compiler, Cadence Genus, PrimeTime, Tempus, VCS, Xcelium, Verdi, DVE, SpyGlass, JasperGold
2w
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Software Engineering Leader
Hillsboro or Folsom or Santa Clara or Austin or Phoenix
$234k-$330k/yr HybridFull Time
15+ YOE10+ MgmtBachelor's in EE/CS, 15+ years experience including 10+ years leading software engineering teams; 5+ years in system profiling, debugger, performance or compiler engineering; strong leadership and cross-team collaboration.
Intel System Debugger, Intel VTune Profiler