1mo
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CPU Micro-architect
San Jose or Austin
$151k-$252k/yr OnsiteFull Time
6+ YOE6–10+ years experience depending on degree; strong background in CPU microarchitecture, performance modeling and optimization, simulation, Verilog/SystemVerilog, C++, Python, and familiarity with Arm/x86/RISC-V ISAs.
Verilog, SystemVerilog, C++, Python, Armv8, Armv9, x86, RISC-V, GB6, SpecInt17
5d
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CPU Verification Engineer
Austin, Texas, United States
$106k-$200k/yr HybridFull Time
3+ YOEDegree in EE/CE or related STEM plus 2–3+ years verification experience; expertise in SystemVerilog/UVM, scripting (Python/Perl), C++, CPU architecture knowledge, debugging and verification methodologies.
SystemVerilog, UVM, Python, Perl, C++, VCS, GIT, Assembly
2mo
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Principal CPU Power Architect
Santa Clara or Austin or Hillsboro
$272k-$431k/yr OnsiteFull Time
15+ YOEBS/MS in Electrical Engineering, Computer Science, or related field; 15+ years of CPU architecture experience; strong power, RTL, and process knowledge; expertise in power delivery, power gating, di/dt, and thermal throttling; low power techniques across SW/Architecture/RTL/VLSI.
RTL, VLSI, CPU architecture, Power delivery, Power gating, Di/dt, Thermal management
1mo
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CPU Core Performance Staff Engineer
Austin, Texas, United States
$156k-$268k/yr HybridFull Time
Experience in CPU architecture and performance modeling, simulator development, workload/trace analysis, strong problem-solving and communication, technical leadership; Bachelors/Masters/PhD in Computer or Electrical Engineering.
1mo
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Senior CPU Power Delivery Engineer
Austin, Texas, United States
$152k-$255k/yr OnsiteFull Time
5+ YOEBS/MS/PhD in electrical engineering, 5+ years power delivery/power integrity experience for digital ICs, PDN simulation tool experience, CPU power knowledge, advanced-node physical design experience.
Apache Redhawk, Voltus, SIwave, oscilloscope, VNA, PDN analyzer
2mo
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CPU Verification Fellow, RISC-V High-Performance Processor
Santa Clara or Austin
$100k-$500k/yr HybridFull Time
Experience leading verification for high-performance CPUs; strong SystemVerilog/UVM; knowledge of RISC-V; ability to guide large engineering teams.
SystemVerilog, UVM, Constrained-Random Verification, Formal Verification, ISA, Debug Methodologies
3w
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Senior CPU Performance Architect
Austin or Portland or Mountain View or Poughkeepsie
$163k-$237k/yr OnsiteFull Time
8+ YOE8+ years in microprocessor architecture and performance, Bachelor's in EE/CE/CS or equivalent, RN? (ignore) BLS? (ignore) Experience with performance modeling, EM/RTL correlation, and system software knowledge.
ARM, RISC-V, x86, RTL, Linux
1mo
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Server CPU Systems Engineer
Austin, Texas, United States
OnsiteFull Time
Experience with server rack and blade deployment, rack-and-stack, DCIM/asset management, cabling, Linux/Ubuntu, Python scripting, automation testing, inventory audits, and system validation; strong problem-solving and communication.
Cisco UCS, HPE Synergy, Dell MX, DCIM, Linux, Ubuntu, Python, DNS, DHCP
2w
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Principal Design Verification Engineer – CPU Subsystem Power Management
Austin or Santa Clara
OnsiteFull Time
12+ YOEBS/MS/PhD in EE/CE/CS,12+ years CPU/SoC functional verification with strong CPU-subsystem power-management expertise, SystemVerilog and Python skills, experience with formal/emulation and subsystem signoff, strong communication.
SystemVerilog, Python, formal, emulation
2mo
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Graphics Architect, Platform Architecture
Austin, Texas, United States
OnsiteFull Time
Bachelor’s degree; GPU/CPU/DSP/ISP architecture experience; C/C++, XSL, and Python or Ruby programming.
2mo
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Software Solutions Architect
Austin or Boxborough or Markham
$212k-$318k/yr HybridFull Time
Senior-level architect with strong software engineering, enterprise delivery, and customer-facing leadership; deep AI/ML and GPU/CPU experience.
C/C++, Python, Docker, Kubernetes, ONNX, PyTorch, ROCm, CUDA, TensorRT
1w
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Technical Account Manager
Bastrop or Los Angeles or Seattle
OnsiteFull Time
7+ YOE7+ years in large-scale compute or hyperscale infrastructure, BS in CS/EE/CE or related, experience with GPU/CPU cluster implementations, strong communication and troubleshooting skills.
InfiniBand, RoCE, NCCL, NVLink, GPU Direct RDMA, Linux
1w
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Sr. Manager, Datacenter Compute Infrastructure (Starlink)
Palo Alto or Austin
$185k-$260k/yr OnsiteFull Time
8+ YOE4+ MgmtBachelor's degree with 10+ years (or 14+ years in lieu),8+ years in global compute hardware supply chain,4+ years people management; expertise in GPUs/CPUs/storage sourcing and supplier management.
3w
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BIOS Senior/Lead Software Engineer
Austin, Texas, United States
OnsiteFull Time
6+ YOEExpert C programming and low-level firmware/BIOS/boot loader experience; CPU bring-up experience; familiarity with Linux kernel, x86/ARM architectures; strong software design, debugging, and communication skills.
C, C++, Python, Linux Kernel, x86, ARM, EOS
1mo
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Senior/Staff Design Engineer
Santa Clara or Richardson or Austin
$69k-$202k/yr OnsiteFull Time
2+ YOEBachelor's (3–7 yrs) or Master's (2–5 yrs); knowledge of CPU microarchitecture, System Verilog/Verilog/VHDL, simulators, timing/power; scripting in Perl or Python; experience with RISC-V/ARM/MIPS preferred.
System Verilog, Verilog, VHDL, Perl, Python, RISC-V, ARM, MIPS
1mo
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Principal Heterogeneous Systems Architect
Austin, Texas, United States
HybridFull Time
10+ YOEBS in EE/CE/CS (MS/PhD preferred), 10+ years in system/platform/compute architecture, deep knowledge of heterogeneous computing (CPUs, GPUs, FPGAs, accelerators), HW/SW co-design experience, programming in C/C++, Python, CUDA/OpenCL/SYCL or HDL, US work authorization required.
C/C++, Python, CUDA, OpenCL, SYCL, Verilog, VHDL