66 cpu verification engineer jobs at 16 companies in United States
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CPU Verification Engineer
Austin or Santa Clara
OnsiteFull Time
Requires a BS in electrical or computer engineering or equivalent experience; expertise in CPU verification, C/C++/assembly, Verilog, SystemVerilog, UVM, coverage, assertions, and verification flows.
C, C++, UVM, SystemVerilog, Verilog, Verilog simulator
1mo
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CPU Verification Engineer
Austin, Texas, United States
$106k-$200k/yr HybridFull Time
3+ YOEDegree in EE/CE or related STEM plus 2–3+ years verification experience; expertise in SystemVerilog/UVM, scripting (Python/Perl), C++, CPU architecture knowledge, debugging and verification methodologies.
SystemVerilog, UVM, Python, Perl, C++, VCS, GIT, Assembly
14h
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CPU Verification Engineer
Fort Collins, Colorado, United States
$178k-$268k/yr OnsiteFull Time
Expert C++ skills, functional verification experience with CPU or ASIC/SoC designs, cache architecture and coherence knowledge, Python or Perl proficiency, and a preferred bachelor's or master's degree.
C++, C, Python, Perl
2mo
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CPU Verification Engineer (RISC-V)
Santa Clara or Austin
$167k-$251k/yr OnsiteFull Time
2+ YOEExperience validating CPU and SoC micro-architectures (RISC-V preferred), developing test plans/testbenches and verification environments, executing regressions and debug. Bachelor's in EE/CE/CS +4 yrs (or MS+3/PhD+2) in related engineering.
RISC-V, Assembly, Simulators, Gate-level Simulation, Waveform viewers
3w
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CPU SoC Verification Engineer
San Diego or Mountain View
$138k-$197k/yr OnsiteFull Time
4+ YOEBachelor's in EE/CE/CS or equivalent,4 years ARM SoC verification experience,EMB/GLS/post-silicon debug experience,EMR not relevant,proficiency with UVM/OVM and Python/Perl preferred.
UVM, OVM, Python, Perl, SDF, ATE
1w
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Design Verification Engineer- CPU
Santa Clara, California, United States
$200k-$350k/yr OnsiteFull Time
8+ YOE8+ years verifying high-performance CPUs or complex digital designs; SystemVerilog, UVM, C, C++, assertions, coverage, testbench, and debugging experience; BS+ in engineering or computer science.
SystemVerilog, UVM, C, C++, ARM, RISC-V, FPGA
4w
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Staff Design Verification Engineer – High Performance CPU Core
Austin or Santa Clara
OnsiteFull Time
7+ YOE7+ years ASIC/CPU/SoC design verification experience, strong SystemVerilog and UVM skills, CPU microarchitecture knowledge, BS in EE/CE/CS, strong debug and verification strategy abilities.
SystemVerilog, UVM, Python, C, C++
2mo
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Senior Verification Engineer, SoC
Santa Clara or Westford or Austin or Hillsboro or California
$136k-$265k/yr HybridFull Time
5+ YOEBachelor's in EE/CS/CE or equivalent, 5+ years ASIC DV experience, strong problem-solving, testbench/methodology development, deep verification knowledge, proficiency in C++, UVM, or System Verilog, SoC/CPU architecture experience.
C++, Object-Oriented Programming, UVM, System Verilog
2mo
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Design Verification Engineer IV
San Jose, California, United States
$112k-$176k/yr OnsiteFull Time
6+ YOEExpertise in SystemVerilog/UVM, AXI/PCIe/Ethernet/NOC/UCIe protocols, CPU architectures (ARM, RISC-V) and C/C++; 6–8+ years verification experience; formal verification and scripting experience; ability to architect SoC verification environments.
SystemVerilog (SV), UVM, AXI, NOC, Ethernet, PCIe, UCIe, ARM, RISC-V, C, C++
2w
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CPU Design Methodology Engineer
Hillsboro or Austin or Santa Clara or Arizona
$168k-$311k/yr HybridFull Time
8+ YOEMaster's in Computer or Electrical Engineering or equivalent experience; 8+ years in chip design, SOC integration, and design automation; RTL, verification, scripting, synthesis, and physical design experience.
Verilog, UVM, SystemVerilog, Perl, Python
2w
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CPU Design Methodology Engineer
Hillsboro or Austin or Santa Clara or Arizona
$168k-$311k/yr HybridFull Time
8+ YOEMaster's in computer or electrical engineering or equivalent experience; 8+ years in chip design focused on SoC integration and design automation; RTL, verification, scripting, analytical, and problem-solving skills required.
Verilog, UVM, SystemVerilog, Perl, Python
1w
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Staff GPU Design Verification Engineer – Formal Verification
Austin, Texas, United States
$151k-$227k/yr OnsiteFull Time
5+ YOERequires 6+ years with a bachelor's, 4+ with a master's, or 2+ with a Ph.D.; 5+ years in GPU, CPU, or semiconductor formal verification; SystemVerilog, SVA, programming, architecture, and formal EDA expertise.
Python, Perl, C, C++, SystemVerilog, SystemVerilog Assertions (SVA), UVM (IEEE 1800 Universal Verification Methodology), Confluence, JIRA, UPF
2w
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Hardware Verification Engineer
San Diego, California, United States
$94k-$134k/yr HybridFull Time
5+ YOE5+ years validating hardware and software, a bachelor's or master's in Electrical or Computer Engineering, lab instrumentation expertise, C/C++, Python, embedded systems, IC bring-up, protocols, and FPGA experience.
C, C++, Python, I2C, I3C, SPI, MIPI, GPIB, JTAG, PCIe, Xilinx, Vivado, ARM, RISC-V, PIC, STM32, SystemVerilog, Verilog, VHDL, Matlab, Git, Cursor, Claude, GitHub Copilot, FPGA, logic analyzers, oscilloscopes, supplies, multimeters, development boards, processors, microcontrollers
3w
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Staff SoC Power Performance Verification Engineer
Austin, Texas, United States
$198k-$268k/yr HybridFull Time
Requires SoC RTL performance analysis, hardware emulation, emulator bring-up, system-level debugging, memory architecture knowledge, Verilog/SystemVerilog, C/C++, Python or Ruby, and multiprocessor architecture expertise.
RTL, System-on-Chip (SoC), Verilog, SystemVerilog, C, C++, Python, Ruby, Unix, Linux, Git, Subversion, AI, ARM architecture, CPU, GPU, I/O, MMU
2w
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Staff Engineer AI/ML
Santa Clara or Austin or Richardson
$143k-$275k/yr OnsiteFull Time
10+ YOEMaster's with 10+ years or PhD with 5+ years; expertise in CPU, vector or GPU architecture, RTL, SystemVerilog, Verilog or VHDL, microarchitecture, datapaths, verification, timing, power, and area.
SystemVerilog, Verilog, VHDL, Perl, Python, RISC-V, ARM, MIPS, GPUs, SIMD
1w
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Aerothermodynamics Engineer
Mountain View or Hampton or Greenbelt or Huntsville or Dallas or Houston or Denver or Edwards
$125k-$200k/yr OnsiteFull Time
Master's degree in aerospace, aeronautical, mechanical, or related engineering; numerical CFD methods; massively parallel CPU/GPU CFD solvers; hypersonic multiphysics simulations; mesh generation; and verification and validation experience.
Computational Fluid Dynamics (CFD), High-Performance Computing (HPC), GPU, Python, Linux, MPI, Fortran, C++, CUDA, HIP, OpenMP, Kokkos, RAJA, PETSc, Trillions, HDF5, JAX, NumPy, PyTorch
2w
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Physical Design Lead Engineer
Windsor or United States
$130k-$160k/yr HybridFull Time
5+ YOEBachelor's degree in Electronics Engineering or related field plus 5 years of relevant experience. Requires place-and-route, STA, CTS, physical verification, advanced process node, CPU design, and timing constraint expertise.
TSMC, ICC2, Innovus, Cadence, Synopsys, Synopsys PrimeTime, Python, Calibre, Verilog, SystemVerilog, Microsoft Excel
2w
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High Performance Computing Digital Design Engineering - Mid to Experienced Level (Maryland)
Fort Meade, Maryland, United States
$105k-$193k/yr OnsiteFull Time
3+ YOEEngineering, physics, materials science, or related degree plus relevant experience in digital equipment, HDL, embedded software, design verification, electronics systems, CAD, EDA, or integrated circuits.
Register Transfer Level (RTL), Field Programmable Gate Arrays (FPGAs), Printed Circuit Board (PCB), Electronic Design Automation (EDA), Unified Verification Methodology (UVM), C, C++, OpenCL, Perl, Python, TCL, VHDL, Verilog, SystemVerilog, ASICs, CAD, DAWIA, PMP, CPU, GPU
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