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6 design verification intern jobs at 3 companies in Berkeley, CA

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Design Verification Intern
Burlingame, California, United States
$45-$60/hr OnsiteTemporary
Quadric
Quadric: Designing licensable processor IP for on-device AI inference.
Pursuing a Bachelor's/Master's/PhD in CS/EE; knowledge of verification methods for CPU/GPU; proficient in SystemVerilog/SystemC/C++; UVM a plus; able to document test plans, write/debug tests, and generate coverage; strong problem-solving and communication.
SystemVerilog, SystemC, C/C++, UVM, Python
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1w
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Intern - Design Verification Infrastructure Engineer - Platform
Santa Clara or Austin or Berkeley or Boston
OnsiteFull Time
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
Software engineering experience with a compiled and a scripting language, modern engineering practices, production deployments; familiarity with Chisel/CIRCT/MLIR and EDA flows preferred.
Chisel, CIRCT, MLIR, Scala, Python
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2mo
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Intern - Design Verification Infrastructure Engineer - Platform
Santa Clara or Austin or Berkeley or Boston
OnsiteFull Time, Internship
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
Software engineer with experience in at least one compiled language and one scripting language; knowledge of modern software practices; production deployments.
Scala, Python, Chisel, CIRCT, MLIR
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3w
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SSG Design Engineering Intern (Fall 2026)
San Jose, California, United States
$35-$62/hr OnsiteFull Time
Cadence
CadenceNASDAQ: CDNS: Developing computational software and hardware for electronic system design.
Enrolled in BS/MS in Electrical or Computer Engineering, strong digital design or verification fundamentals, scripting (Tcl/Perl/shell), SystemVerilog/UVM/SVA exposure, strong communication skills.
SystemVerilog, UVM, SVA, Tcl, Perl, Shell, Electronic Design Automation (EDA)
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3w
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SSG Design Engineering Intern (Fall 2026)
San Jose, California, United States
$35-$62/hr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNasdaq: CDNS: Provides software and hardware for designing advanced semiconductor systems.
Currently enrolled BS/MS in Electrical or Computer Engineering, strong digital design or verification fundamentals, System Verilog/UVM/SVA exposure, Tcl/Perl/shell scripting and EDA tool familiarity.
System Verilog, Tcl, Perl, shell scripting, UVM, SVA, Electronic Design Automation (EDA) tools
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3w
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SSG Design Engineering Intern (Fall 2026)
San Jose, California, United States
$35-$62/hr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
Currently enrolled in BS/MS in EE/Computer Engineering, strong digital design or verification fundamentals, SystemVerilog/UVM/SVA exposure, scripting with Tcl/Perl/shell, familiarity with EDA tools, strong communication skills.
System Verilog, UVM, SVA, Tcl, Perl, shell scripting, Electronic Design Automation (EDA)
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