10 dft engineer jobs at 6 companies in San Diego, CA

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Synthesis-DFT Stitch CAD Engineer
San Diego, California, United States
$164k-$246k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
6+ YOEExperience in synthesis, DFT, place-and-route CAD development; Python and TCL scripting; bachelor's/master's/PhD in engineering with relevant ASIC/CAD experience; strong communication and problem-solving skills.
Synopsys, Cadence, Python, TCL
3mo
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ASIC Design Engineer (Hardware Security)
San Diego or Santa Clara
$140k-$230k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
6+ YOEBachelor's in electrical engineering (or related), 6+ years ASIC design experience, Verilog/SystemVerilog RTL design, CDC, DFT, synthesis, timing closure, bus protocols knowledge, strong problem solving and communication skills; hardware security experience preferred.
Verilog, SystemVerilog, RTL, DFT, AHB, AXI
3d
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Senior Hardware Test Engineer
San Diego, California, United States
$114k-$167k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
Master's degree in electrical engineering, computer engineering, computer science, or a related field; experience with hardware/software testing, ATE platforms, SIP/SOC products, DFT, characterization, and production test solutions.
Automatic Test Equipment (ATE), Design for Test (DFT), System-in-Package (SIP), System-on-Chip (SOC)
2mo
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Sr Electrical Engineer
San Diego, California, United States
$105k-$120k/yr OnsiteFull Time
Helios Technologies
Helios TechnologiesNASDAQ: HLIO: Designs and manufactures industrial hydraulic and electronic control systems.
5+ YOEBSc in Electrical Engineering, 5+ years electronics systems design experience, Altium Designer proficiency, microcontrollers, power supplies, RF, PCBA verification/DFM/DFT, familiarity with UL/IEC/EMI-EMC, English and Spanish, international travel ability.
Altium Designer
2mo
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Senior Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
San Diego, California, United States
$136k-$201k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
5+ YOE5+ years in ASIC timing/STA; strong STA tooling, scripting; experience with 5nm/4nm nodes; collaboration across RTL/DFT/Analog.
Primetime, Tcl, Python, Perl
3mo
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Senior Silicon ATE Development Test Engineer, Amazon Leo Silicon Team
Sunnyvale or San Diego
OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
5+ YOEBachelor's in Electrical/Communications Engineering; 5+ years RF test/production test experience; strong communication; willingness to travel.
Teradyne, Advantest, JTAG, DFT, DFM, Python, PERL, Tcl/Tk
2w
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SerDes Design and Validation Engineer
San Diego, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Lead system validation of mixed-signal SerDes IP; analog and mixed-signal circuit design; develop analog DFT; create test plans; work with ATE and system validation teams; debug high-speed serial link issues.
ATE
3w
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SerDes Design and Validation Engineer
San Diego, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Lead system validation of mixed-signal SerDes IP; design and optimize analog/mixed-signal circuits; develop analog DFT; create test plans and analyze data; work with production test/ATE and debug system bring-up issues.
ATE
2mo
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Senior SoC STA Engineer
San Diego, California, United States
OnsiteFull Time
InnoPhase IoT
InnoPhase IoT: Develops ultra-low power wireless semiconductor platforms for IoT devices.
10+ YOESenior SoC timing sign-off ownership; 10+ years in chip-level STA; Cadence Tempus; Python/Tcl scripting; strong cross-functional collaboration.
Cadence Tempus, Python, Tcl, DFT tools, CPDF/UPF tools
1mo
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Digital ASIC Design Engineer for Mixed-Signal IPs
San Diego, California, United States
$116k-$173k/yr OnsiteFull Time
Qualcomm
QualcommNASDAQ: QCOM: Designs and manufactures semiconductors and wireless telecommunications products.
3+ YOEMaster's degree in EE/CE or related, 3+ years RTL and ASIC design experience, proficiency with front-end ASIC tools (VCS, Fusion Compiler, PrimeTime, Power Compiler, DFT Compiler, Spyglass), strong digital architecture and DSP knowledge.
VCS, Fusion Compiler, PrimeTime, Power Compiler (PTPX), DFT Compiler, Spyglass, Python, Perl, GDSII