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6 dft engineer jobs at 4 companies in Warwick, RI

5d
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Sr. Design for Test (DFT) Engineer
Toronto or Mountain View or Boston
HybridFull Time
Lightmatter
Lightmatter: Develops photonic processors and interconnects for AI data centers
13+ YOEBachelor's in Electrical Engineering, 13+ years DFT experience on ASICs, 2+ tapeouts, experience with DFT CAD/ATPG, Python/TCL scripting, post-silicon bring-up and ATE interfacing.
Python, TCL, SystemVerilog, ATPG, ATE
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5d
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Sr. Design for Test (DFT) Engineer
Mountain View or Boston or Toronto
$164k-$185k/yr HybridFull Time
Lightmatter
Lightmatter: Develops photonic processors and interconnects for AI data centers
5+ YOEBachelor's in EE/CE,5+ years DFT experience for advanced ASICs,pre- and post-silicon validation,Python/TCL scripting,Verilog,knowledge of scan/ATPG/MBIST/JTAG and commercial EDA DFT tools.
Python, TCL, Verilog, ATPG, MBIST, JTAG, ATE
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5d
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Sr. Design for Test (DFT) Engineer
Boston or Mountain View or Toronto
$154k-$218k/yr HybridFull Time
Lightmatter
Lightmatter: Develops photonic processors and interconnects for AI data centers
5+ YOEBachelor's in EE/CE,5+ years DFT experience for advanced ASICs,pre-/post-silicon validation,Python/TCL scripting,Verilog,ATPG/MBIST/JTAG expertise,commercial EDA DFT tool experience.
Python, TCL, Verilog, ATPG, MBIST, JTAG, Boundary Scan, ATE
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2mo
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ASIC Physical Design Engineer
Maynard or Austin
$136k-$195k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
5+ YOEBachelors in Engineering with 5+ years or Masters in Engineering with 3+ years in ASIC physical design; experience with floorplanning, place-and-route, STA, timing closure, DFT collaboration, scripting, and design flow optimization.
Cadence Innovus, Synopsys ICC2, Synopsys DC/FC, Synopsys Formality, Cadence LEC, Tempus, Python, TCL, Perl
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2w
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Senior Manufacturing Engineer
Cambridge, Massachusetts, United States
$202k-$270k/yr OnsiteFull Time
Walden Robotics
Walden Robotics: Builds general-purpose robots and develops hardware and processes to enable scalable robotic systems.
8+ YOE8+ years manufacturing/process engineering experience delivering electromechanical products; DFx, NPI, quality systems, GD&T, tolerance and BOM experience required.
DFx, DFM, DFA, DFT, FAI, PPAP, SPC, FMEA, CAPA, GD&T, BOM
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4d
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Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.
DDR, LPDDR, GDDR, HBM, eMMC, logic synthesis, physical design, timing, DRC/LVS, Formal verification, Design-For-Test, DFT
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