2mo
Save
Mark Applied
Hide
Director Silicon Design Engineering
San Jose, California, United States
HybridFull Time
15+ YOE5+ Mgmt15+ years ASIC/semiconductor leadership; strong hands-on design and program management; FPGA experience a plus; deep ASIC development lifecycle knowledge.
RTL, ASIC, Analog Design, Digital Design, Tapeout, Post-Silicon Validation