10 dsp engineer jobs at 6 companies in Naperville, IL
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Senior Embedded Software Engineer, DSP
Chicago, Illinois, United States
$140k-$175k/yr OnsiteFull Time
5+ YOEB.S. or M.S. in EE/CE or related, 5+ years developing real-time embedded systems in C/C++, DSP proficiency, strong signal processing and linear algebra knowledge, technical writing and communication skills, U.S. Person required.
C/C++, SDR, RF
2mo
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Principal / Sr. Principal Electronics Engineer
Rolling Meadows, Illinois, United States
$109k-$163k/yr OnsiteFull Time
3+ YOEBachelor in Electrical Engineering with 5+ years or Master with 3+ years; RF/EW/Radar experience; DSP on FPGA; C/C++, Python or MATLAB; LabVIEW/LabWindows/CVI familiarity; US citizenship and ability to obtain Secret clearance.
C++, Python, MATLAB, LabVIEW, LabWindows/CVI, Genesys PathWave, DSP, FPGAs
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Sr Embedded Engineer
Aurora or Melville
$102k-$173k/yr HybridFull Time
5+ YOE5+ years embedded firmware experience for sensor applications; proficiency in C/C++; experience with microcontrollers, DSPs, SoCs; sensor interfacing and signal processing; strong analytical and communication skills.
C, C++, microcontrollers, DSP, SoC
2mo
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Digital Hardware Development Engineer
Schaumburg, Illinois, United States
$76k-$100k/yr OnsiteFull Time
Design and develop digital hardware for public safety radio products; digital/analog circuitry, FPGA/DSP, Ethernet; automated testing with Python.
FPGA, DSP, Ethernet, Cadence, Schematic capture, Python
2mo
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Firmware Engineer
Homewood, Illinois, United States
$83k-$95k/yr OnsiteFull Time
Bachelor's in Computer Engineering/Computer Science or related field; knowledge of firmware and hardware product development, ARM/Cortex processors, RTOS (Keil RTX, rtlinux, FreeRTOS), peripheral interfaces (UART, SPI, I2C, CAN, PCI/PCIe, Ethernet, USB, TCP/IP, UDP), C/C++, CAD and VHDL tools; ISO9001 compliance.
ARM, Cortex-M0, Cortex-M4, Keil RTX, rtlinux, FreeRTOS, DSP, UART, SPI, I2C, CAN, PCI/PCIe, Ethernet, USB, TCP/IP, UDP, Or-CAD, PADS, VHDL, Xilinx, Altera, C, C++, Cadence, CAD Capture
2mo
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Principal / Sr. Principal Electronics Engineer
Rolling Meadows, Illinois, United States
$109k-$163k/yr OnsiteFull Time
3+ YOEU.S. citizen eligible for Secret clearance; Bachelor's or Master's in STEM with 3–9+ years' relevant experience; experience with airborne RADAR/EW, C++, Python, MATLAB, LabVIEW/LabWindows/CVI, PathWave (Genesys), FPGA/DSP, and system integration/testing.
C++, C, Python, MATLAB, Simulink, LabWindows/CVI, LabVIEW, PathWave RF Synthesis (Genesys), Microsoft Office, Altium Designer
2mo
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Principal/ Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$224k/yr OnsiteFull Time
5+ YOEUS citizen able to obtain Top Secret/SCI; Bachelor's in EE/CE (or similar); 5+ years FPGA/ASIC design (8+ for senior); VHDL/Verilog, HLS (Xilinx Vivado HLS/Mentor Catapult), Python/C/C++, DSP and FPGA toolchain experience.
VHDL, Verilog, Xilinx Vivado HLS, Mentor Catapult HLS, C++, Python, C, Electronic Design Automation (EDA) Tools, Mentor Graphics ModelSim, QuestaSim, Synplify, Xilinx ISE, Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder, SystemVerilog, Universal Verification Methodology (UVM), MATLAB, Simulink, AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, GIT, SVN, ClearCase, DOORS, Jira, Rally, ClearQuest, Signal Generators, Logic Analyzers, Digital Oscilloscopes
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Space Systems Embedded Software Engineer - Level 2 (TS/SCI)
Rolling Meadows, Illinois, United States
$88k-$131k/yr OnsiteFull Time
2+ YOEBachelor's or Master's in STEM with 2+ years experience, active Top Secret/SCI clearance preferred, C/C++ and scripting experience, lab testing and DSP familiarity, RTOS and embedded Linux exposure.
C, C++, Python, JavaScript, Perl, Unix/DOS shell scripts, Oscilloscopes, signal generators, spectrum analyzers, RTLinux, VxWorks, Integrity, FreeRTOS, Yocto, Jira, Confluence, Bitbucket, Linux, Windows, AMD, Xilinx, Altera, GNU Radio, Redhawk
2mo
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Principal/ Sr. Principal FPGA Design Engineer
Rolling Meadows, Illinois, United States
$120k-$224k/yr OnsiteFull Time
5+ YOEUS citizen able to obtain Top Secret/SCI clearance; B.S. in EE/CE or similar plus 5+ years FPGA/ASIC design (8+ for senior level). Requires VHDL/Verilog, HLS (Vivado/Mentor Catapult), timing closure, DSP knowledge, Python/C/C++, testbench and FPGA design flow experience.
VHDL, Verilog, Xilinx Vivado HLS, Mentor Catapult HLS, C++, Python, C, MATLAB, Simulink, Mentor Graphics ModelSim, QuestaSim, Synplify, Xilinx ISE, Xilinx Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder, SystemVerilog, Universal Verification Methodology (UVM), GIT, SVN, ClearCase, DOORS, Jira, Rally, ClearQuest, AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet
2mo
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Citi Commerce, Product Lead
New York or Atlanta or Charlotte or Irving or Jacksonville or O'Fallon or Schaumburg or Wilmington
$177k-$265k/yr HybridFull Time
10+ YOE10+ years product management experience in digital advertising, adtech/martech, or commerce media; deep ad tech knowledge; writing engineering-ready technical requirements; managing third-party integrations; navigating governance and compliance; stakeholder management.
AdTech, MarTech, DSPs, ad servers, clean rooms, identity solutions, attribution platforms, programmatic infrastructure