2mo
Save
Mark Applied
Hide
Senior Staff R&D Electrical Engineer
Santa Clara, California, United States
$160k-$180k/yr OnsiteFull Time
10+ YOEBSEE with 15+ years or MSEE with 10+ years; strong fundamentals in machine design, power distribution, I/O control, interlock design; experience with PCBA design tools; DFMEA; PLM/ERP BOMs/ECOs.
AutoCAD Electrical, Altium, Spice, Oscilloscope, DVM, Logic analyzers
1mo
Save
Mark Applied
Hide
Senior Engineer I - Product
San Jose, California, United States
$70k-$205k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical Engineering, 5+ years experience, JEDEC qualification knowledge, silicon reliability understanding, hands-on software automation and hardware development, Verilog/VHDL/C/Python/Perl, ATE and wafer test experience.
Verilog, VHDL, C, Python, Perl, Agentic AI, ATE
1w
Save
Mark Applied
Hide
Controls Design Engineer I
Pleasanton, California, United States
$43-$52/hr OnsiteFull Time
Bachelor's in mechanical or electrical engineering preferred; strong mechanical aptitude; ability to read blueprints and schematics; organized, independent, valid driver’s license; OSHA 10/30 training; AutoCAD/VISIO/EDS skills.
AutoCAD, VISIO, EDS, Microsoft Office, Windows, TCP/IP
2mo
Save
Mark Applied
Hide
SR ASIC Design Engineer - Ethernet Switch & High-Speed I/O
Santa Clara, California, United States
$175k-$300k/yr OnsiteFull Time
BS or MS in Electrical/Computer Engineering; experience with ASIC/RTL design; knowledge of Ethernet, SerDes, and high-speed I/O; scripting (Perl/Python/Shell); experience with SystemVerilog/Verilog; VCS; strong communication and problem-solving skills.
VCS, SystemVerilog, Verilog, Perl, Python, Shell, RTL design, SerDes
1w
Save
Mark Applied
Hide
High Speed Analog I/O designer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
10+ YOEMaster's or Ph.D. in electrical/electronics engineering, 10+ years analog design experience with high-speed RX/AFE and DDR/chiplet I/O, FinFET experience, proficiency with Cadence Virtuoso, Maestro, Spectre, HSPICE, strong problem-solving and communication skills.
Cadence Virtuoso, Maestro, Spectre, HSPICE
2w
Save
Mark Applied
Hide
Controls Engineer, Fuel Fabrication
Idaho Falls or Santa Clara
$100k-$150k/yr HybridFull Time
3+ YOEBachelor's in engineering, 3+ years I&C experience with PLC/SCADA/SQL, scripting (Python or VBA), V&V experience, ability to read electrical schematics and P&IDs, strong communication and cross-functional collaboration skills.
PLC, DCS, HMI, SCADA, SQL, PostgreSQL, MS SQL, Python, VBA, Ignition, Wonderware, Aveva, Allen-Bradley, Siemens, MES
4d
Save
Mark Applied
Hide
Hardware Design Engineer
San Jose, California, United States
$110k-$130k/yr OnsiteFull Time
2+ YOEBachelor's in Electrical or Computer Engineering, 2+ years hardware/PCB design experience, hands-on lab equipment use, familiarity with server interfaces (PCIe, DDR, USB, Ethernet, I²C/SMBus, SPI, UART), and willingness to travel domestically and internationally.
oscilloscope, logic analyzer, PCIe, DDR, USB, Ethernet, I²C/SMBus, SPI, UART
1mo
Save
Mark Applied
Hide
SoC Verification Engineer – NoC / UVM
San Jose, California, United States
$146k-$250k/yr HybridFull Time
Expertise in SystemVerilog and UVM, ASIC/SoC verification, constraint-random and coverage-driven methodologies, formal verification (SVA); experience with Synopsys VCS and Cadence IES preferred; B.S. or M.S. in computer/electrical engineering.
SystemVerilog, UVM, OVM, VMM, Verilog, SystemVerilog Assertions (SVA), Synopsys VCS, Cadence IES, Cadence IEV, Jasper, Synopsys VC-Formal, Magellan
1mo
Save
Mark Applied
Hide
Senior Technologist Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering
Milpitas, California, United States
$194k-$322k/yr OnsiteFull Time
15+ YOEMaster's in Electrical Engineering (or equivalent) with 15+ years experience; transistor/gate-level datapath and page-buffer design; RTL/Verilog, synthesis, static timing, silicon debugging, and high-speed I/O knowledge.
Verilog
1mo
Save
Mark Applied
Hide
Senior Digital Design Engineer - High-Speed I/O and Photonics
Santa Clara, California, United States
$136k-$265k/yr HybridFull Time
5+ YOEB.S. or M.S. in Electrical Engineering (or equivalent experience), 5+ years high-speed digital design, Verilog/System Verilog and UVM experience, knowledge of timing, synthesis, PPA trade-offs, and post-silicon bring-up.
Verilog, System Verilog, UVM, RTL
1mo
Save
Mark Applied
Hide
Development Engineer Technician I
Santa Clara or California
$25-$35/hr OnsiteFull Time
1+ YOEPerform solar cell reliability testing, characterize electrical/optical properties, maintain environmental chambers, operate and calibrate lab equipment, and analyze test data. Requires technical experience (min 1 year) and proficiency with MS Office; SQL/JMP a plus.
Microsoft Office, SQL, JMP
1mo
Save
Mark Applied
Hide
Development Engineer Technician I
Santa Clara or California
$25-$35/hr OnsiteFull Time
1+ YOEEducation/experience combos from HS +4 yrs to Bachelor +1 yr. Perform sample testing, semiconductor/device fabrication, electrical or optical measurements; operate, calibrate, and maintain lab equipment; intermediate MS Office; SQL/JMP a plus; up to 10% domestic travel.
Microsoft Office, SQL, JMP
3w
Save
Mark Applied
Hide
SoC Architect
San Jose, California, United States
HybridFull Time
Expertise architecting SoC and I/O subsystems (PCIe/CXL/UAL), BS/MS/PhD in electrical or computer engineering or related field, strong communication, and domain experience in embedded/data-center/automotive/aerospace.
PCIe, CXL, UAL, Confidential Compute, FPGA, AXI, x86, RISC-V, ARM
2w
Save
Mark Applied
Hide
Principal SoC Architect, Robotics and Automotive
Santa Clara, California, United States
$272k-$489k/yr OnsiteFull Time
15+ YOE15+ years SoC architecture experience, Master’s/PhD in computer/electrical engineering or equivalent, expertise in SoC definition, real-time/RTOS support, safety, high-speed I/O, and SystemC/C++/Python modeling.
SystemC, C++, Python, PCIe, GMSL, Time-Sensitive Networking (TSN)
2w
Save
Mark Applied
Hide
Product Line Manager, Optical I/O Chiplets
San Jose, California, United States
$170k-$223k/yr OnsiteFull Time
5+ YOEBS in Electrical Engineering,5+ years product management of advanced-node silicon from concept to volume,experience with chiplet/productization,strong technical depth in packaging,UCIe and SerDes;MS/MBA preferred.
UCIe, SerDes
1mo
Save
Mark Applied
Hide
Senior Global Account Manager (Production Board Test, San Jose, CA)
San Jose, California, United States
$133k-$212k/yr OnsiteFull Time
10+ YOEBachelor’s in Electrical Engineering or equivalent, 10+ years in capital equipment/test & measurement, direct customer engagement experience, expertise in RF/Board Test/Photonics/High‑speed I/O, strong optical communications network, and ability to travel internationally (15–20%).
Explore Jobs