2mo
Save
Mark Applied
Hide
Semiconductor Design Engineer
Boise, Idaho, United States
OnsiteFull Time
Bachelor’s degree in Electrical or Electronics Engineering; experience in analog/digital CMOS design, circuit simulation (SPICE/Verilog), layout, verification, and memory/logic/analog blocks; interpret specs and optimize for cost, performance.
SPICE, VERILOG, CAD tools, layout tools
1mo
Save
Mark Applied
Hide
Semiconductor Design Engineer
Boise, Idaho, United States
HybridFull Time
2+ YOEBachelor's or Master’s degree in Electrical/Electronics Engineering with relevant experience; 2+ years for Bachelor’s track or more with Master’s.
SPICE, VERILOG
2mo
Save
Mark Applied
Hide
Semiconductor Design Engineer
Boise, Idaho, United States
OnsiteFull Time
Bachelor's in EE/Electronics or related; analog and digital CMOS design, circuit debugging and verification, parasitic modeling, SPICE and VERILOG simulation, layout optimization and cross-functional collaboration.
SPICE, VERILOG, CAD
1w
Save
Mark Applied
Hide
Design for Test (DFT) Engineer
Boise, Idaho, United States
$115k-$170k/yr OnsiteFull Time
3+ YOEB.S. in electrical/electronics or equivalent, several years hands-on electronics test or board-level design experience, expertise in schematics/layout, test development, and DFT practices.
boundary scan/JTAG, flying probe, bed-of-nails, SPEA 4080, Keysight i3070, Python, C
3mo
Save
Mark Applied
Hide
New College Grad - Design and Verification Engineer, Pathfinding
Folsom or Boise or San Jose
$67k-$142k/yr OnsiteFull Time
Bachelor’s, Master’s, or Ph.D. in Electrical Engineering or Electronics; UNIX and Cadence; circuit- and memory-verification experience; DFT and RTL/STA knowledge preferred.
UNIX, Cadence, SystemVerilog, Verilog, SPICE, Schematic entry
1mo
Save
Mark Applied
Hide
Engineer, SIG Equip Software Design
Boise, Idaho, United States
HybridFull Time
Bachelor's in EE/CE or related field;开发 and modify equipment firmware/software using C, C++, Bash, Python on RHEL-compatible Linux and containers; read schematics; debug analog/digital circuitry, microcontrollers, PCBs; use electronic lab equipment.
C, C++, Bash, Python, RHEL, Linux, STL, Containers, DMM, Oscilloscope, Frequency Counter, SMU
2mo
Save
Mark Applied
Hide
Electrical Engineer
Boise, Idaho, United States
$74k-$95k/yr HybridFull Time
2+ YOEBachelor’s in Electrical/Computer/Electronics; 2+ years electrical systems; circuit design; IoT, sensors; PCB design; C/C++; cross-functional teamwork; relocation possible; hybrid work.
CANalyzer, CANape, CANbus, Oscilloscope, Multimeter, Power supplies, PCB design tools, C, C++
6d
Save
Mark Applied
Hide
Senior Layout Designer - Pathfinding
Boise or Richardson
OnsiteFull Time
3+ YOEAS or BS in Electronics/Electrical Engineering plus 3 years semiconductor layout design experience; strong EDA tool skills (Cadence Virtuoso, Synopsys, Calibre), physical verification, debugging, and communication.
Cadence Virtuoso, Synopsys, Calibre
6d
Save
Mark Applied
Hide
Staff Layout Designer - Pathfinding
Boise or Richardson
OnsiteFull Time
10+ YOEAS or BS in Electronics/Electrical Engineering plus ~10 years semiconductor layout experience; deep EDA tool knowledge; debugging, automation, mentoring, and block leadership skills.
Cadence Virtuoso, Synopsys, Calibre
6d
Save
Mark Applied
Hide
Senior Layout Designer - Pathfinding
Boise or Richardson
OnsiteFull Time
3+ YOEAS or BS in Electronics/Electrical Engineering plus 3+ years semiconductor layout experience; deep knowledge of EDA tools, strong verification and debugging skills, communication and leadership ability.
Cadence Virtuoso, Synopsys, Calibre
6d
Save
Mark Applied
Hide
Staff Layout Designer - Pathfinding
Boise or Richardson
OnsiteFull Time
10+ YOEAS/BS in Electronics or related plus 10+ years semiconductor layout experience; deep EDA tool knowledge (Cadence Virtuoso, Synopsys, Calibre); debugging, automation, mentoring, and layout methodology expertise.
Cadence Virtuoso, Synopsys, Calibre