The University of Texas System: Public university system administration for the state of Texas.
7+ YOEBachelor's in risk management/business or related field,7+ years progressive risk/compliance/audit experience,knowledge of COSO ERM or ISO 31000,excellent communication and presentation skills.
University of Texas System: Coordinates and supports 14 academic and health institutions.
7+ YOEBachelor's in risk management/business or related and 7 years progressive risk, compliance, or audit experience; familiarity with COSO ERM/ISO 31000; strong written, oral and presentation skills.
Retym: Developing coherent DSP silicon for AI data center infrastructure.
5+ YOE5+ years verification experience, 2+ full block/system verification cycles, deep VLSI verification knowledge, experience with SystemVerilog/UVM/eRM, familiarity with data-paths/protocols (Ethernet preferred), mentoring and cross-team collaboration.
CapMetro: Provides public bus and rail transportation services in Austin.
10+ YOE6+ MgmtBachelor's in related field, 10+ years risk management experience (6+ years leadership), professional risk qualification (ERM/IRM/FRM), advanced Microsoft Office proficiency, ERM implementation and leadership skills.
MWResource: Specialized consulting and staffing for critical energy infrastructure systems.
5+ YOEBachelor's in Finance/Engineering/Economics (or equivalent), 5+ years (Senior) / 8+ years (Lead) ERM or related experience; experience designing quantitative risk models; PMP/CQRM preferred; US work authorization required.
KPMG: Global professional services network providing audit, tax, and advisory.
5+ YOEMinimum five years exempt organization experience, bachelor’s degree, licensed CPA/EA/JD/LLM or approved credential within one year if not held; CIA desired; strong internal controls, internal audit, ERM, engagement and team management, and communication skills.
Retym: Developing coherent DSP silicon for AI data center infrastructure.
10+ YOE3+ Mgmt10+ years in digital design verification, 3+ years leading verification teams, expertise with SystemVerilog/UVM, VLSI verification flows, completed multiple full block/system verification cycles, strong leadership and debugging skills.
Retym: Developing coherent DSP silicon for AI data center infrastructure.
10+ YOE10+ years experience in VLSI verification, 2+ full block/system verification cycles, deep knowledge of verification flows, SystemVerilog and UVM experience, and familiarity with data-path protocols (Ethernet preferred).