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Mark Applied
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FPGA Designer
Niskayuna, New York, United States
$120k-$180k/yr HybridFull Time
Bachelor's or Master’s in EE/CE/CS, strong synchronous digital design and embedded firmware (C/C++), FPGA development (VHDL/Verilog), timing closure and verification tools, familiarity with SoC platforms; onsite Tue–Thu (hybrid).
VHDL, Verilog, QuestaSim, Quartus, Xcelium, C, C++, Altera, Xilinx, Zynq, MATLAB/Simulink