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IP Design Verification Engineer
Folsom, California, United States
$106k-$149k/yr HybridFull Time
3+ YOEExperience with Verilog/VHDL/SystemVerilog, C/C++/Python, FPGA/emulation, hardware/software debug, computer architecture knowledge; Bachelor's+3yrs or Master's+1yr in electronics/computer engineering.
Verilog, VHDL, SystemVerilog, C, C++, Python, FPGA, VCS, Verdi, DVE, OVM/UVM, logic analyzers, oscilloscopes, protocol analyzers, IA-Core Assembly
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Senior Hardware Design Engineer, Ethernet Switching
Roseville, California, United States
$260k-$470k/yr OnsiteFull Time
10+ YOEBSEE or MSEE; 10+ years hardware engineering experience designing high-speed networking hardware (100G/200G PAM4). Experience with multi-layer high-speed PCBs, signal/power integrity, FPGA/Verilog, and taking products from concept to production.
Verilog, DDR, PCIe, FPGA, VNA, TDR, S-parameters
1mo
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Principal Engineer, Firmware Security
San Jose or Longmont or Folsom
$161k-$318k/yr OnsiteFull Time
10+ YOEBachelor's degree, 10+ years security firmware experience, applied cryptography and post‑quantum expertise, proficiency in C and Python, experience with SoC/FPGA debugging, and knowledge of storage security standards.
C, Python, Rust, JTAG, FPGA, SoC, Caliptra
3mo
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Digital Design Engineer
Saratoga, California, United States
$150k-$250k/yr OnsiteFull Time
Design digital avionics boards, high-speed interfaces, clocking, power budgeting, radiation-tolerant design; collaborate with FPGA teams; board bring-up and design reviews.
Altium Designer, HyperLynx SI, HyperLynx PI, Full-Wave, SPICE-based circuit simulation, FPGA vendor toolchains
2mo
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422
2mo
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ASIC Senior Verification Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
10+ YOE10+ years in VLSI design/verification; FPGA/EDA; Verilog/SystemVerilog; scripting (Python, TCL, PERL); C/C++; UVM; BS or MS in EE/CS.
Verilog, SystemVerilog, UVM, EDA, C, C++, Python, Perl, TCL
1mo
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DSP Specialist FAE (Field Applications Engineer) – West Region
Sacramento, California, United States
$159k-$230k/yr RemoteFull Time
10+ YOE10+ years FPGA digital design and DSP experience, Bachelor's degree in a STEM field, proficiency with Quartus/Vivado, DSP Builder/System Generator/OneAPI, MATLAB/Simulink, Python or C/C++, and willingness to travel; eligibility for required U.S. export authorizations.
Quartus, Vivado, DSP Builder, System Generator, OneAPI, MATLAB, Simulink, Python, C/C++
1mo
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Senior ASIC verification engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
10+ YOEBachelor's degree in EE/CE, 10+ years VLSI design/verification experience, proficiency in Verilog/SystemVerilog, UVM, scripting (Python, Perl, Tcl), C/C++, strong VLSI architecture and leadership skills.
Python, Perl, Tcl, C, C++, Verilog, SystemVerilog, UVM, Specman, Electronic Design Automation (EDA), FPGA tools
2mo
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Product Marketing Manager-SoC/FPGA
Folsom, California, United States
$93k-$160k/yr OnsiteFull Time
5+ YOE5+ years in product marketing, content strategy, or technical communications in semiconductor/high-tech; Electrical/Computer Engineering or related degree; expert PowerPoint and storytelling.
PowerPoint, Excel
1mo
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HBM Hardware Emulation Architect
Folsom or Richardson
$146k-$309k/yr OnsiteFull Time
10+ YOEBachelor's/Master's in EE/CE or equivalent, 10+ years engineering/design experience, strong RTL design and debug, hands-on hardware emulation platform experience, SoC architecture and firmware interaction expertise.
Palladium, Veloce, Zebu, FPGA
1mo
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HBM Hardware Emulation Architect
Folsom or Richardson
$146k-$309k/yr OnsiteFull Time
10+ YOEBachelor's/Master's in EE/CE or equivalent; 10+ years engineering/design experience; strong RTL design and debug skills; hands-on experience with hardware emulation platforms; SoC architecture and firmware familiarity.
Palladium, Veloce, Zebu, FPGA