7 fpga engineer jobs at 2 companies in Greenleaf, ID
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Senior Principal ASIC FPGA Engineer
Boise, Idaho, United States
$191k-$212k/yr HybridFull Time
10+ YOEBachelor's in EE/CE (or Master's) plus 10+ years (or 8+ with Master's), DoD Secret clearance, 10–15+ years ASIC/FPGA RTL design experience, full tape-out lifecycle, FinFET/node experience, EDA and verification expertise, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office
3mo
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FPGA Engineer (Idaho, Boise)
Boise, Idaho, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
RTL, C/C++, Python, VHDL, Verilog, Tcl; hardware security; Xilinx; Vivado; IP core development; system integration; cryptography; hardware/software co-design; experience with simulation and verification tools; ability to obtain/maintain U.S. government security clearance.
C/C++, Python, VHDL, Verilog, Tcl, Vivado, Questa, Quartus Prime, GHDL, Xilinx, AXI, Avalon, ACE, IP core design, HDL
3w
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Senior DRAM Security Test Engineer
Boise, Idaho, United States
OnsiteFull Time
BS in EE/CE or equivalent; FPGA development with Verilog/SystemVerilog/VHDL; Xilinx Vivado or Intel Quartus; Python or C++; hardware/software integration, automation, and memory systems knowledge.
Verilog, SystemVerilog, VHDL, Xilinx Vivado, Intel Quartus, Python, C++, Claude, FPGA, PCIe, AXI, DMA, JEDEC, ATE
2mo
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Sr. Product Security Engineer
Boise, Idaho, United States
OnsiteFull Time
3+ YOEBachelor's degree in engineering or CS, 3+ years firmware/embedded experience, proficiency in Python and C/C++, strong Linux and computer architecture foundation, fundamental cybersecurity knowledge.
Python, C/C++, Linux, FPGA
1w
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (Master's+3 acceptable), U.S. citizenship, ability to obtain DoD Secret clearance, 5–8+ years ASIC/FPGA RTL design experience, formal verification and verification-process experience, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office, STA
3w
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Senior DRAM Security Test Engineer
Boise, Idaho, United States
OnsiteFull Time
BS in EE/CE or equivalent, FPGA development with Verilog/SystemVerilog/VHDL, Xilinx Vivado or Intel Quartus, Python/C++ skills, hardware/software integration, EM automation, and experience with AI-assisted development tools.
Verilog, SystemVerilog, VHDL, Xilinx Vivado, Intel Quartus, Python, C++, Claude, PCIe, AXI, DMA, JEDEC, ATE
1w
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Lead ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$177k-$187k/yr RemoteFull Time
8+ YOEBachelor's in ECE or related plus 8+ years (or Master's plus 6+ years), strong RTL/ASIC/FPGA design experience, ASIC tape-out and timing closure experience, ability to obtain DoD Secret clearance, proficiency with JIRA and Microsoft Office.
JIRA, Microsoft Office