13 fpga engineer jobs at 7 companies in Loomis, CA
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Principal Engineer, SOC Design
Folsom, California, United States
$199k-$319k/yr OnsiteFull Time
15+ YOEExtensive SoC architecture and RTL development experience with modern DRAM technologies, verification/debugging skills, FPGA prototyping or silicon bring-up experience, and strong technical leadership.
SystemVerilog, Verilog, FPGA
1mo
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Senior Hardware Design Engineer, Ethernet Switching
Roseville, California, United States
$260k-$470k/yr OnsiteFull Time
10+ YOEBSEE or MSEE; 10+ years hardware engineering experience designing high-speed networking hardware (100G/200G PAM4). Experience with multi-layer high-speed PCBs, signal/power integrity, FPGA/Verilog, and taking products from concept to production.
Verilog, DDR, PCIe, FPGA, VNA, TDR, S-parameters
2mo
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Principal Engineer, Firmware Security
San Jose or Longmont or Folsom
$161k-$318k/yr OnsiteFull Time
10+ YOEBachelor's degree, 10+ years security firmware experience, applied cryptography and post‑quantum expertise, proficiency in C and Python, experience with SoC/FPGA debugging, and knowledge of storage security standards.
C, Python, Rust, JTAG, FPGA, SoC, Caliptra
2w
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Electronics Engineer
McClellan, California, United States
$99k-$153k/yr OnsiteFull Time
1+ YOEBachelor's in engineering (ABET or equivalent) plus 1 year specialized experience with FPGA (VHDL/Verilog), PCB design (Altium/Cadence/OrCad), RF simulation/testing, and use of electronic analysis equipment; transcripts and security clearance required.
VHDL, Verilog, Power Analyzers, Signal Analyzers, Network Analyzers, Oscilloscopes, GPS Simulators, Altium, Cadence, OrCad, Anechoic Chambers, CST Studio, Antenna Magus, ADS Software, Electronic Medical Records (EMR)
2mo
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422
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Principal Engineer - Validation (Systems)
Roseville, California, United States
$75k-$232k/yr OnsiteFull Time
10+ YOE10+ years SoC/silicon validation experience, strong C/C++ and Python scripting, hands-on lab skills with high-speed test equipment, SoC system-level debug, and a BS/MS in Computer/Electrical Engineering or Computer Science.
C, C++, Python, Tcl, oscilloscope, protocol analyzer, logic analyzer, FPGA, VHDL, Verilog, Linux, Windows, PCIe, DDR4, DDR5, SAS, SATA, I2C, SPI, ThreadX, RTOS, MIPS
3mo
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ASIC Senior Verification Engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
10+ YOE10+ years in VLSI design/verification; FPGA/EDA; Verilog/SystemVerilog; scripting (Python, TCL, PERL); C/C++; UVM; BS or MS in EE/CS.
Verilog, SystemVerilog, UVM, EDA, C, C++, Python, Perl, TCL
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Principal Engineer - Validation (Systems)
Burnaby or Roseville
$86k-$186k/yr OnsiteFull Time
10+ YOERequires 10 years of silicon or SoC validation experience, C/C++ and Python or Tcl skills, lab equipment experience, system-level debugging, and a bachelor's or master's degree in engineering or computer science.
C, C++, Python, Tcl, oscilloscopes, protocol analyzers, logic analyzers, FPGA, VHDL, Verilog, Linux, Microsoft Windows, PCIe, DDR4/5, SAS, SATA, I2C, SPI, ThreadX, RTOS
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Sr Engineer I - Validation (Systems)
Burnaby or Roseville
$86k-$186k/yr OnsiteFull Time
5+ YOERequires 5+ years of silicon or SoC validation experience, C/C++ and Python or Tcl skills, lab equipment experience, system-level debugging, and a computer, electrical engineering, or computer science degree.
C, C++, Python, Tcl, FPGA, VHDL, Verilog, PCIe, DDR4, DDR5, SAS, SATA, I2C, SPI, Linux, Windows, ThreadX, RTOS, MIPS
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Sr Engineer I - Validation (Systems)
Roseville, California, United States
$70k-$205k/yr OnsiteFull Time
5+ YOE5+ years SoC/silicon validation experience, strong C/C++/Python/Tcl skills, hands-on lab experience with high-speed test equipment, SoC system-level debug, and a Bachelor's in EE/CE/CS.
C, C++, Python, Tcl, Oscilloscope, Protocol Analyzer, Logic Analyzer, FPGA, VHDL, Verilog, Linux, Windows, MIPS, PCIe
2mo
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Senior ASIC verification engineer
Roseville, California, United States
$154k-$311k/yr OnsiteFull Time
10+ YOEBachelor's degree in EE/CE, 10+ years VLSI design/verification experience, proficiency in Verilog/SystemVerilog, UVM, scripting (Python, Perl, Tcl), C/C++, strong VLSI architecture and leadership skills.
Python, Perl, Tcl, C, C++, Verilog, SystemVerilog, UVM, Specman, Electronic Design Automation (EDA), FPGA tools
1mo
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HBM Hardware Emulation Architect
Folsom or Richardson
$146k-$309k/yr OnsiteFull Time
10+ YOEBachelor's/Master's in EE/CE or equivalent, 10+ years engineering/design experience, strong RTL design and debug, hands-on hardware emulation platform experience, SoC architecture and firmware interaction expertise.
Palladium, Veloce, Zebu, FPGA
1mo
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HBM Hardware Emulation Architect
Folsom or Richardson
$146k-$309k/yr OnsiteFull Time
10+ YOEBachelor's/Master's in EE/CE or equivalent; 10+ years engineering/design experience; strong RTL design and debug skills; hands-on experience with hardware emulation platforms; SoC architecture and firmware familiarity.
Palladium, Veloce, Zebu, FPGA