25 fpga engineer jobs at 13 companies in Lowell, IN
1mo
Save
Mark Applied
Hide
FPGA Engineer
Chicago, Illinois, United States
$120k-$170k/yr OnsiteFull Time
4+ YOE4+ years FPGA/ASIC experience, expert SystemVerilog and FPGA design, SoC and high-speed transceiver knowledge, simulation/verification skills, degree in EE/CE, strong analytical and collaboration skills.
SystemVerilog
2mo
Save
Mark Applied
Hide
Senior FPGA Engineer
Chicago or New York City or London
$225k-$325k/yr OnsiteFull Time
3+ YOEBachelor's in Computer or Electrical Engineering, 3+ years FPGA/hardware engineering experience, RTL/Verilog expertise, FPGA design flow experience, knowledge of TCP/IP, strong autonomous and problem-solving skills.
Verilog, System Verilog, RTL, XILINX, ALTERA, TCP/IP, synthesis, place & route, static timing analysis
2mo
Save
Mark Applied
Hide
FPGA Engineer
Amsterdam or Chicago or London or New York City or Singapore
OnsiteFull Time
Professional FPGA/ASIC design and verification experience; SystemVerilog/Verilog/VHDL and C++; familiarity with EDA tools and scripting (TCL, Python, Bash); university degree in EE/CS/CE or related.
SystemVerilog, Verilog, VHDL, C++, TCL, Python, Bash, EDA
1mo
Save
Mark Applied
Hide
FPGA Engineer Intern (Summer 2027 - Austin)
Austin or Chicago
OnsiteInternship
Student in Computer/Electrical Engineering (BS/MS/PhD) graduating Dec 2027–Jun 2028; hands-on FPGA/ASIC digital design experience; VHDL/Verilog/System Verilog experience; strong engineering instincts and teamwork skills.
FPGAs, ASICs, VHDL, Verilog, System Verilog
1mo
Save
Mark Applied
Hide
Junior FPGA Engineer
Chicago, Illinois, United States
$150k/yr HybridFull Time
1+ YOEBachelor's in EE/CE/CS,1-3 years relevant experience, strong SystemVerilog/Verilog skills, ModelSim simulation experience, Python proficiency, familiarity with FPGA flows and high-speed interfaces.
SystemVerilog, Verilog, ModelSim, Questa, Vivado Simulator, Python, PCIe, Ethernet, DDR, Xilinx/AMD Vivado, Intel/Altera Quartus
3mo
Save
Mark Applied
Hide
FPGA Engineer (IL, Chicago)
Chicago, Illinois, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
3+ YOEProficient in RTL, C/C++, Python, VHDL, Verilog; experience with FPGA toolchains and hardware security; able to travel up to 10%; eligible for U.S. government security clearance.
Verilog, VHDL, SystemVerilog, C, C++, Python, Tcl, Vivado, Questa, GHDL, Quartus Prime, Xilinx, Versal, Agilex, Stratix, AXI, ACE, Avalon, IP core, Coc otb, pyuvm
1mo
Save
Mark Applied
Hide
Campus FPGA Engineer (Intern)
Chicago, Illinois, United States
$250k/yr OnsiteInternship
Undergraduate or graduate concentration in EE/CS, FPGA and RTL experience (SystemVerilog/Verilog/VHDL), familiarity with C/C++/Python, prior hardware or low-level software internship experience, reliable availability.
SystemVerilog, Verilog, VHDL, C, C++, Python, lowRISC, RISC-V, CocoTB, Chisel, Opencore, Bluespec, HLS, OpenCL, Linux kernel, Raspberry Pi, Arduino
1mo
Save
Mark Applied
Hide
Junior FPGA Developer
Chicago, Illinois, United States
$100k-$175k/yr OnsiteFull Time
BS/MS in EE/CE or related field, hands-on RTL design in Verilog/SystemVerilog, familiarity with ModelSim/QuestaSim/Vivado/Quartus and synthesis flow, Linux proficiency, Python/C/C++ a plus, eagerness to apply AI tools and learn HFT.
Verilog, SystemVerilog, ModelSim, QuestaSim, Vivado, Quartus, Linux, Python, C, C++
2mo
Save
Mark Applied
Hide
Hardware Developer
Chicago, Illinois, United States
OnsiteFull Time
5+ YOE5+ years hardware development experience; expert Verilog/SystemVerilog/VHDL and C/C++; experience with FPGAs, Xilinx Vivado, network protocols, debugging, profiling, and low-latency systems.
Verilog, SystemVerilog, VHDL, C, C++, Xilinx Vivado, FPGA, IP
2mo
Save
Mark Applied
Hide
Trading Strategy Software Engineer
Chicago, Illinois, United States
HybridFull Time
Strong command of modern C++ for performance-critical, low-latency systems; deep OS/memory/concurrency knowledge; ability to co-design with FPGA hardware; collaborative communication skills. FPGA, kernel-bypass networking, ML, or market microstructure experience preferred.
C++, FPGA, HLS, ef_vi, OpenOnload, DPDK
1mo
Save
Mark Applied
Hide
Hardware Engineer
Chicago, Illinois, United States
$200k-$225k/yr OnsiteFull Time
BS in EE/CE/CS or related, strong RTL design using SystemVerilog, C++ experience, verification and multi-clock-domain knowledge, Ethernet fundamentals, Python/Bash scripting, and strong debugging and collaboration skills.
SystemVerilog, C++, Python, Bash, FPGA, PMA (Physical Media Attachment), Ethernet, RTL
1w
Save
Mark Applied
Hide
Hardware Engineer
Chicago, Illinois, United States
$200k-$225k/yr OnsiteFull Time
BS+ in a technical discipline, strong SystemVerilog RTL design experience, digital design knowledge, C++ and scripting experience, verification and testing expertise, networking fundamentals, and strong debugging skills.
SystemVerilog, C++, Python, Bash, FPGA, Ethernet, PMA
1mo
Save
Mark Applied
Hide
Quantitative Developer Intern - Summer 2027
New York City or Chicago
$4k-$6k/wk OnsiteInternship
Currently enrolled degree student in CS, math, physics, EE or related; proficient in C++ or Python; working knowledge of Linux/Unix; strong problem-solving and communication skills; interest in financial markets.
C++, Python, Linux/Unix, FPGA
1mo
Save
Mark Applied
Hide
Senior Low Latency C++ Developer
Chicago or London or New York
$200k-$300k/yr OnsiteFull Time
Expert C++ (C++20/23) with Python or Rust; strong algorithms, data structures, networking (TCP/UDP, multicast), Linux systems programming, and production low-latency trading experience; familiarity with CI/CD and containerization.
C++, C++20, C++23, Python, Rust, TCP, UDP, multicast, Linux, FPGA, RDMA, Kubernetes, Docker, CI/CD
1mo
Save
Mark Applied
Hide
Senior Low Latency C++ Developer
New York or London or Chicago
$200k-$300k/yr OnsiteFull Time
Expert C++ (C++20/23), strong Python or Rust experience, solid algorithms/data-structures and distributed systems knowledge, networking and Linux systems programming, performance profiling, CI/CD familiarity, on-call participation.
C++, C++20, C++23, Python, Rust, TCP/UDP, multicast, Linux, FPGA, RDMA, Kubernetes, Docker, CI/CD
2mo
Save
Mark Applied
Hide
High-speed Photonic Experimentalist
Palo Alto or Chicago or Brisbane
$152k-$175k/yr OnsiteFull Time
MS or PhD in EE/physics/optical engineering, hands-on high-speed electro-optic characterization experience, familiarity with RF/microwave/optical test equipment, automation and data-analysis skills, and ability to develop characterization plans and mentor junior staff.
Ansys Lumerical, Tidy3D, COMSOL Multiphysics, Meep, HFSS, ADS, Cadence AWR, SPICE, oscilloscopes, signal generators, VNAs, high-speed probes, optical power meters, lasers, photodetectors, FPGAs, PCBs, TIAs
Explore Jobs