3mo
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FPGA Engineer (Utah, Salt Lake City)
Salt Lake City, Utah, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Design, develop, test, and maintain FPGA IP cores and hardware security systems; RTL, VHDL/Verilog, C/C++, Python, Xilinx/Intel FPGA tools; travel and ability to obtain security clearance.
VHDL, Verilog, C/C++, Python, Tcl, Vivado, Questa, GHDL, Quartus Prime, Zynq, Versal, Agilex, AXI, ACE, Avalon, IP Core, Cocotb, pyuvm
2mo
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Scientist, Electrical Engineer Digital Hardware Design (38126)
Salt Lake City, Utah, United States
OnsiteFull Time
12+ YOEExperienced engineer with ~12+ years hardware design experience or equivalent; active DoD Secret clearance; FPGA/CCA/PCB design and verification experience; proficiency with FPGA toolchains and version control; strong communications and systems skills.
Xilinx, Altera, Siemens EDA (Mentor Graphics), Git, ClearCase, Teamcenter, Confluence
1mo
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Sr. Specialist, Digital Hardware Design Engineer (40130)
Salt Lake City, Utah, United States
OnsiteFull Time
6+ YOEBachelor's plus 6 years (or Master's plus 4, or 10 years experience) in hardware design; experience with PCB layout, schematic capture, FPGA and embedded processors, lab debug, and high-speed interfaces.
FPGA, PCIe, DDR3, DDR4, JESD, SPI, UART, 1GE, 10GE, 40GE, 100GE, C, Mentor Graphics, Git, ClearCase, Confluence
1w
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (Master's+3 acceptable), U.S. citizenship, ability to obtain DoD Secret clearance, 5–8+ years ASIC/FPGA RTL design experience, formal verification and verification-process experience, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office, STA
1w
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Lead ASIC Digital Design Engineer
Annapolis Junction or Telework or Boise or Salt Lake City or Bloomington
$177k-$187k/yr RemoteFull Time
8+ YOE8+ years ASIC/FPGA RTL design experience, ASIC tape-out and timing-closure experience, familiarity with FinFET nodes and commercial foundry flows, EDA tool and JIRA proficiency, strong RTL and microarchitecture skills.
JIRA, Microsoft Office
4w
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Staff RF Microwave Design Engineer - 19026**
Roy, Utah, United States
$153k-$191k/yr OnsiteFull Time
8+ YOESTEM degree plus 8–12+ years relevant RF/microwave engineering experience, active Secret clearance, HWIL and RF test experience, MATLAB and RF test equipment proficiency, leadership and systems-integration skills.
Hardware in the Loop, MATLAB, FPGA, HFSS, Spectrum Analyzer, Signal Generator, Network Analyzer, Oscilloscope
1w
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Lead ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$177k-$187k/yr RemoteFull Time
8+ YOEBachelor's in ECE or related plus 8+ years (or Master's plus 6+ years), strong RTL/ASIC/FPGA design experience, ASIC tape-out and timing closure experience, ability to obtain DoD Secret clearance, proficiency with JIRA and Microsoft Office.
JIRA, Microsoft Office
1mo
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Senior Specialist, Software Engineering 1 (38244)
Salt Lake City, Utah, United States
OnsiteFull Time
4+ YOEBachelor's degree with 4+ years (or 8 years experience) in embedded real-time software, proficiency in C++, RTOS experience, ability to obtain DoD Secret clearance, troubleshooting and test experience.
RTOS, PCIe, 1553, RS232, SPI, I2C, FPGAs, Linux, Unix, VxWorks, Windows, IP, UDP, TCP, EtherCAT, CAN, RTPS/DDS, UML, C++
1w
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Senior Associate, Software Engineer (41122)
Salt Lake City, Utah, United States
OnsiteFull Time
2+ YOEAbility to obtain DoD Secret clearance, Bachelor's degree in CS/CE/EE, 2+ years relevant experience, proficiency in object-oriented C++, embedded/RTOS experience, and EM/OS exposure.
C++, RTOS, Linux, Unix, VxWorks, Windows, PCIe, 1553, RS232, SPI, I2C, FPGA, IP, UDP, TCP, EtherCAT, CAN, RTPS/DDS