Enrolled in an accredited bachelor's program in electrical or computer engineering, completing year three or later, or an MSEE program; able to develop RTL and run Verilog simulations with familiarity in FPGA tools and digital logic.
FPGA, Verilog, Python, C, logic analyzers, oscilloscopes, signal generators, DIO, SMUs, SPI, I2C, Cadence CAD, Simvision, Xcelium, Genus, Innovus Auto Place and Route