10 fpga intern jobs at 5 companies in Capitola, CA
2d
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2027 PhD Research Engineering Intern/Co-op
San Jose or Santa Clara
$92k-$137k/yr HybridInternship, Temporary
Current US PhD student in computer science, computer engineering, electrical engineering, or related field; technical experience with programming, ML frameworks, hardware design, or computing systems is encouraged.
C, C++, Verilog HDL, Python, P4, Java, MATLAB, Go, PyTorch, TensorFlow, FPGA, ASIC, RTL
2d
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2027 Undergrad Firmware Engineering Co-op/Intern
Santa Clara or San Jose
$64k-$96k/yr HybridInternship, Temporary
Currently enrolled in a US bachelor's program in electrical engineering, computer science, computer engineering, or a related field; experience with firmware, C/C++, embedded systems, hardware architectures, or debugging preferred.
C, C++, BIOS, RTOS, VHDL, Verilog, FPGA, Linux, Perforce, JIRA, Git
2w
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AI Perception Intern (PICO) - 2027 Start (PhD)
San Jose, California, United States
OnsiteInternship
Enrolled PhD (or exceptional undergrad) in EE/ECE/CS/Physics or related; strong Python and/or C/C++ and PyTorch skills; experience in computer vision, embedded/edge systems, or camera pipelines; able to execute scoped projects and communicate effectively.
Python, C/C++, PyTorch, ONNX, TensorRT, NPU, DSP, FPGA, PCB, VLM, LLM
2d
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Summer 2027 Masters Field Applications Engineer Intern
San Jose, California, United States
$83k-$125k/yr HybridInternship, Full Time
Current master's student in computer or electrical engineering at a US university; exposure to digital design, CPU architecture, programming, OOP, scripting, VHDL, Verilog, SystemVerilog, Perl, or Python.
FPGA, x86, VHDL, Verilog, SystemVerilog, Perl, Python
2w
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ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer
San Jose, California, United States
OnsiteInternship
Currently pursuing a master's in computer science, electrical engineering, or a related discipline; knowledge of video codecs; RTL/SystemVerilog or HLS; UVM, SystemC, or DPI; Python programming.
FPGA, ASIC, SystemVerilog, High-level Synthesis (HLS), UVM, SystemC, DPI, Python
1mo
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Firmware Intern
Redwood City, California, United States
$33/hr OnsiteFull Time
Experience programming and shipping hardware; fluent in C/C++ and Python; experience writing low-level drivers, reading PCB schematics, debugging complex systems, and designing fault-tolerant embedded firmware.
C, C++, Python, Amslah, FPGA, HDL
1mo
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Senior Software Engineer, Low Latency Physical AI Sensor Systems
Santa Clara, California, United States
$184k-$357k/yr OnsiteFull Time
8+ YOE8+ years systems programming experience with C/C++/Python, deep Linux internals and networking knowledge (TCP/UDP, RDMA), familiarity with hardware interfaces (PCIe, DMA, FPGA) and low-latency systems.
C, C++, Python, Linux, TCP, UDP, RDMA, GPUDirect, CUDA, Claude, Codex, Cursor, FPGA, PCIe, DMA, SPI, I2C, I2S
3w
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Summer 2027 Intern - Hardware Engineering
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$34-$47/hr HybridInternship
0+ YOEEarly-career candidates pursuing or holding technical degrees in engineering or related fields; experience via coursework, internships, projects; familiarity with programming, embedded systems, digital logic, or hardware design; strong analytical and communication skills.
RTL, Verilog/SystemVerilog, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, CAD, Git, Linux, Microsoft Office, RTOS
2d
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2027 Masters Firmware Engineering Co-op/Intern
San Jose or Santa Clara
$83k-$125k/yr HybridInternship
Currently enrolled in a US master's program in electrical engineering, computer science, computer engineering, or related field; knowledge of C/C++, embedded systems, firmware, hardware architectures, debugging, and development tools preferred.
C, C++, BIOS, RTOS, VHDL, Verilog, FPGA, Linux, Perforce, JIRA, Git
1w
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ASIC Design Engineer Intern (Video Silicon IP) - 2027 Summer
San Jose, California, United States
OnsiteInternship
Currently pursuing an undergraduate degree in computer science, electrical engineering, or a related technical field; knowledge of video codecs; RTL/SystemVerilog or HLS; UVM, SystemC, or DPI; Python programming.
FPGA, ASIC, SystemVerilog, High Level Synthesis (HLS), UVM, SystemC, DPI, Python