PromotedHiringCafe
Founding Full-stack / Product Engineer
Cupertino, CA, US
$130k-$300k/yr On-SiteFull Time
Help us build a 100× better job search engine. We need a full-stack engineer with great taste, sharp fundamentals, and a track record of shipping polished product on React/Next.js plus a real backend (Firebase, Elasticsearch, Redis, Stripe).
React, Next.js, TypeScript, Firebase, Elasticsearch, Redis, Stripe
2mo
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Front-End Designer/Developer
Salem, Oregon, United States
$65k-$78k/yr HybridFull Time
Design and develop accessible front-end websites within CMS; collaborate with customers; ensure WCAG/Section 508 compliance; strong HTML/CSS/JS; UX and accessibility.
HTML, CSS, JavaScript, CMS, Figma, Adobe XD
1mo
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Frontend Engineer
Beaverton, Oregon, United States
RemoteFull Time
5+ YOE5+ years frontend engineering with React and TypeScript; UI production experience; component libraries; data visualization; startup experience preferred.
React, TypeScript, Data Visualization Libraries
3w
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Sr. Front End Engineer
Beaverton, Oregon, United States
OnsiteFull Time
5+ YOE5+ years relevant experience; strong frontend and full-stack skills with Drupal/PHP, React, JavaScript, Python, C#, .NET; experience with AWS or Azure, CI/CD, testing, technical design, and strong communication.
Drupal, PHP, React, JavaScript, Python, C#, ASP, ASP.Net, .NET Core, RESTful API, JSON, jQuery, Microsoft SQL Server, No-SQL databases, AWS, Azure, Azure Service Bus, Azure Event Grid, Azure Durable Functions, Azure Functions, Data Lake, Azure DevOps Pipeline, Terraform, TeamCity, Jenkins, Concourse, Hudson, Bamboo, Acquia
1mo
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Sr. CPU RTL Front End Methodology Engineer
Austin or Phoenix or Hillsboro
$164k-$312k/yr OnsiteFull Time
6+ YOE5+ MgmtRequires 6+ years silicon CPU logic experience, 5+ years technical leadership; degree in CS/Electrical/Electronics engineering (or related) with substantial experience; experience with RTL methodologies, front-end and back-end flows, and use of AI tools.
AI tools
2mo
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Software Engineer II
San Ramon or Beaverton
$85k-$124k/yr RemoteFull Time
3+ YOE3+ years software development; front-end React/Angular/Vue; back-end C#; cloud AWS/Azure; CI/CD; REST APIs; SQL/NoSQL.
React, Angular, Vue.js, C#, AWS, Azure, Google Cloud, Docker, Kubernetes, Azure DevOps, GitHub Actions, Cosmos DB, PostgreSQL, MongoDB
2mo
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Sr. Software Engineer (US Citizenship Required)
Wilsonville, Oregon, United States
OnsiteFull Time
15+ YOE15+ years software development; lead complex projects; .NET, C#, REST, WPF; Windows and Linux; front-end UI; multi-threading; travel up to 25%; US citizenship required.
C#, NET Core, REST, WPF, JSON, LINQ, microservices, C++, WebSockets, video protocols
2mo
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Software Engineer - Digital
Beaverton, Oregon, United States
OnsiteFull Time
4+ YOE4+ years of front-end focused software development; HTML/CSS/JS/TypeScript; React/React Native; test automation; C#/.NET Core API; cloud experience (Azure/AWS/GCP); strong communication; 4-year computer-related degree or equivalent
HTML, CSS, TypeScript, JavaScript, React, React Native, C#, NET Core, Azure, AWS, GCP
1w
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Front-End Fab Category Manager
Beaverton or Wilmington or Camas or San Jose or Ireland
$96k-$131k/yr OnsiteFull Time
10+ YOEDevelop and execute sourcing strategies for fab equipment and services; strong communication, negotiation, supplier management, data-driven problem solving; preferred 10+ years in semiconductor equipment sourcing or fab equipment maintenance.
3mo
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ASIC Design and Integration Engineer
Beaverton, Oregon, United States
OnsiteFull Time
3+ YOEBS + 3 years experience in ASIC design; SystemVerilog, RTL, timing analysis; PCIe knowledge; front-end chip development.
SystemVerilog, RTL, Synthesis, Timing Analysis, PCIe
3mo
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ASIC Design and Integration Engineer
Beaverton, Oregon, United States
OnsiteFull Time
10+ YOEBS plus 10 years in ASIC design; SystemVerilog RTL, synthesis, timing analysis; high-speed I/O (PCIe); front-end development; FPGA prototyping.
SystemVerilog, RTL design, Synthesis, Timing Analysis, PCIe, FPGA prototyping
3w
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SoC Logic Design Engineer
Hillsboro or Santa Clara or Austin
$142k-$200k/yr HybridFull Time
3+ YOEDegree in electrical/computer engineering (BS+4 yrs / MS+3 yrs / PhD+6 mo) and experience in RTL/SystemVerilog, SoC logic integration, microarchitecture, timing/power convergence, and simulation; scripting and front-end RTL tools preferred.
Register Transfer Level (RTL), System Verilog, Python, Perl, Lint, CDC, Synthesis, Static Timing Analysis (STA), DFT, DFD, UVM
2d
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Senior Memory Controller RTL Design Engineer
Redmond or Mountain View or Raleigh or Austin or Hillsboro
$120k-$235k/yr HybridFull Time
1+ YOEDegree in EE/CE/CS or equivalent with 1–5+ years experience depending on degree, strong Verilog/SystemVerilog RTL design skills, DDR4/DDR5 controller experience preferred, scripting (Perl/Tcl/Python), familiarity with front-end verification and low-power/timing checks, ability to pass Microsoft security and export control screenings.
Verilog, System Verilog, Perl, Tcl, Python