11 hardware verification engineer jobs at 8 companies in Cotati, CA
1mo
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Hardware Engineer - FPGA
Milpitas or San Francisco
$152k-$222k/yr OnsiteFull Time
7+ YOEExperienced FPGA/ASIC engineer with RTL (Verilog/SystemVerilog) skills, FPGA tool experience, 7+ years (BS) or 4+ years (MS), verification experience (UVM/VMM) preferred.
Verilog, SystemVerilog, UVM, VMM
3mo
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Hardware Systems Engineer
San Francisco or Cupertino
OnsiteFull Time
3+ YOEBachelor's in Electrical or Computer Engineering; 3+ years hands-on prototype and functional verification with electronics; proficient with lab equipment; strong coding/scripting (Python, Perl, Shell, Unix).
Electronic testing equipment, Scripting languages, Python, Perl, Shell, Unix, Digital multimeter, Oscilloscope, Spectrum analyzer, Signal generator, Power supply, Data logger
3w
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Senior Electrical Engineer — Verification & Test
Alameda, California, United States
OnsiteFull Time
5+ YOEBachelor's in electrical engineering,5+ years experience,hands-on lab debugging,verification protocol development,custom test hardware design,Altium and scripting experience,knowledge of FDA design controls/ISO 13485.
Altium Designer, Python, MATLAB, LabVIEW, TestStand, National Instruments, Keithley
3w
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Electrical Engineer II — Verification & Test
Alameda, California, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering, 2+ years experience, strong analog/digital/mixed-signal skills, verification/test method development, test hardware design, lab instrumentation and scripting (Python/MATLAB/LabVIEW), experience with FDA Design Controls/ISO 13485 preferred.
Altium Designer, oscilloscopes, logic analyzers, digital multimeters, programmable power supplies, source measure units, function generators, data acquisition systems, environmental chambers, Python, MATLAB, LabVIEW, National Instruments, TestStand, SPI, I²C, UART, USB, CAN, BLE
1w
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Staff Test Engineer
Berkeley, California, United States
$148k-$185k/yr OnsiteFull Time
7+ YOEBachelor's in engineering,7+ years test engineering experience in hardware verification,experience with electromechanical systems,data acquisition and test leadership,ability to lead and mentor engineers.
3w
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Lead Systems Engineer, New Product Initiatives
Mountain View or San Francisco
$272k-$336k/yr HybridFull Time
10+ YOEBachelor's in engineering or equivalent,10+ years delivering integrated hardware/software systems,systems engineering fundamentals,requirements and verification experience,Python and SQL skills,technical leadership.
Python, SQL
2w
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Senior Assembly, Integration and Test Engineer
San Francisco, California, United States
$150k-$175k/yr OnsiteFull Time
5+ YOE5+ years in spacecraft AIT or systems engineering with hands-on flight-hardware integration and environmental test experience; requirements, verification, scheduling, and cross-discipline communication skills.
Jama, Valispace, DOORS, Python, GEVS
2mo
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Director of Mechanical Engineering, Hardware Platform
Emeryville or Santa Clara
$275k-$320k/yr HybridFull Time
15+ YOE7+ Mgmt15+ years robotics/precision automation; 7+ years leading engineering teams; strong mechanical design, GD&T, DFMEA/PFMEA; prototype-to-production leadership; cross-functional collaboration.
CAD, GD&T, DFMEA, PFMEA, DVP&R, Verification and Validation, Calibration, Testing
3w
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Senior Electronics Test Engineer
Berkeley, California, United States
$129k-$161k/yr OnsiteFull Time
4+ YOE4+ years PCBA hardware testing experience, bachelor’s in EE/CS or related, 2+ years firmware verification with Pytest, familiarity with high-voltage test instrumentation, communication protocols (CAN-FD, Ethernet, RS485), and Functional Safety.
Pytest, Linux, oscilloscopes, power supplies, data acquisition systems, environmental chambers, electronic loads
2w
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Senior Staff Security Engineer
Berkeley, California, United States
$170k-$223k/yr OnsiteFull Time
10+ YOE10+ years cyber security experience; systems programming in C/C++/Rust; applied cryptography; hardware root-of-trust, secure boot, HSM/HSE/TPM integration; formal verification and threat modeling.
C, C++, Rust, Go, HSM, HSE, TPM, Delay-Disruption Tolerant Networking (DTN), Bundle Protocol, NERC CIP, NIST IR 7628, NIST SP 800-160
3d
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Senior Consultant
San Francisco, California, United States
OnsiteFull Time
5+ YOERequires 5–20 years in hardware-assisted verification, Linux boot and kernel debugging, digital design, emulation, PCIe Gen6, Python, C or Perl scripting, and SystemVerilog RTL coding.
AI, High Performance Computing (HPC), SystemVerilog, Linux, PCIe, HBM, JTAG, UART, Virtual IXIA, ZeBu, Palladium, Veloce, HAPS, Protium, ProFPGA, Python, C, Perl, UVM, C++, SystemC, PCIe Gen6, QEMU