Tower Research Capital: Global quantitative trading firm developing automated algorithmic strategies.
3+ YOEBachelor's degree in electrical engineering or equivalent experience; 3–5 years in ASIC/FPGA development and verification; expertise in Verilog, SystemVerilog/VHDL, Xilinx tools, networking, Linux, Python, and C/C++.
Two Sigma: Systematic investment management and quantitative trading firm.
1+ YOEMinimum 1 year RTL design and verification experience, proficiency in SystemVerilog and Python, FPGA/ASIC knowledge, timing analysis, network protocol familiarity; C++ is a plus.
FujitsuTokyo Stock Exchange: 6702: Global provider of IT services and computing hardware products.
Experience in logic circuit design, semiconductor circuit design, or processor performance and power evaluation and verification. Daily conversational language ability required; Japanese conversational proficiency preferred.