2mo
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Hardware Engineer, Design Verification
New York City or San Francisco or Seoul or Copenhagen or London
$140k-$180k/yr HybridFull Time
5+ YOE5+ years in Digital Verification in semiconductor/EDA; SystemVerilog/UVM; EDA tools (vManager, Xcelium, Jasper); Python or Perl scripting; end-to-end verification expertise.
SystemVerilog, UVM, EDA tools, vManager, Xcelium, Jasper, Python, Perl
1w
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Two Sigma Securities, Hardware Engineer
New York City, New York, United States
$165k-$300k/yr HybridFull Time
1+ YOEMinimum 1 year RTL design and verification experience, proficiency in SystemVerilog and Python, FPGA/ASIC knowledge, timing analysis, network protocol familiarity; C++ is a plus.
SystemVerilog, Python, FPGA, ASIC, C++
5d
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Digital Engineer V
Huntsville or Exeter or Plainview or Hauppauge or Colorado Springs or Colorado
$150k-$200k/yr OnsiteFull Time
10+ YOEBachelor's in Electrical or Computer Engineering, minimum 10 years experience in digital hardware design, expertise in FPGA and high-speed interfaces, signal/power integrity, schematic capture, and hardware verification.
Siemens DXDesigner, Altium Designer, Hyperlynx SI/PI
1w
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Senior Systems Security Engineer
Totowa, New Jersey, United States
OnsiteFull Time
5+ YOEBachelor's degree plus 5+ years systems engineering experience, ability to obtain Secret clearance, systems/hardware/software engineering, requirements writing, architecture definition, integration, verification, and customer engagement.
Cameo, MagicDraw, Xilinx, Microsemi