4 performance modeling engineer jobs at 3 companies in Danville, VA

1mo
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Performance Modeling Architect – AI Systems
Durham or Santa Clara or Boston or Austin
$200k-$500k/yr OnsiteFull Time
Velaura AI
Velaura AI: Developing ultra-low-power silicon and IP for AI accelerators.
Experienced in computer/system architecture and performance modeling; building simulation or analytical models; strong programming skills (Python, C++); knowledge of CPUs/GPUs/accelerators; ability to analyze system bottlenecks.
Python, C++
2d
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Senior Performance Test Engineer (LoadRunner, JMeter)
Durham, North Carolina, United States
HybridFull Time
Cognizant
CognizantNASDAQ: CTSH: Provides IT consulting and technology services to global enterprises.
6+ YOERequires 6+ years in software quality, performance testing, or engineering; LoadRunner and JMeter expertise; APM, programming, SQL, metrics analysis, workload modeling, and scalability testing experience.
LoadRunner, JMeter, Application Performance Monitoring (APM), Datadog, New Relic, AWS CloudWatch, Performance Center, Java, Python, JavaScript, SQL, CI/CD, DevOps, GenAI, NeoLoad, Gatling, AppDynamics, Dynatrace
2w
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Senior Memory System Architect
Santa Clara or Austin or Durham
$152k-$288k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
3+ YOEM.S./Ph.D. or equivalent, 3+ years SoC or memory system architecture experience, deep memory subsystem knowledge, performance modeling, C/C++, Python/Perl, Verilog/SV/UVM exposure, strong communication.
C++, Python, Perl, Verilog, SV/UVM
2w
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Senior Memory System Architect
Santa Clara or Durham or Austin
$152k-$288k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
3+ YOEM.S. or Ph.D. in CS/CE/EE (or equivalent),3+ years SoC or memory system architecture experience, expertise in caches, coherence, DDR, interconnects,performance modeling, C/C++, Python/Perl; BSV/Verilog/SV/UVM a plus.
C++, Python, Perl, Verilog, SystemVerilog, UVM