1mo
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IC Design Engineer
Fort Collins or San Jose
$101k-$162k/yr OnsiteFull Time
3+ YOEExperience in design automation for ASICs; proficiency with Perl, Python, Ruby, Tcl, C++, Verilog HDL, UNIX/Linux; understanding of digital logic and scan test architecture; bachelor's/master's in related engineering with 3–5+ years' experience.
Bash, Perl, Ruby, Python, Tcl, C++, Verilog HDL, UNIX, Linux
2w
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Post-Silicon Validation Engineer
Fort Collins, Colorado, United States
HybridFull Time
Experience validating microprocessors/ASICs in lab, strong programming/scripting (x86 assembly,C/C++,Perl,Ruby,Python), knowledge of Verilog/System Verilog, BS/MS in EE/CS preferred, strong problem-solving and communication.
x86 assembly, C, C++, Perl, Ruby, Python, Verilog HDL, System Verilog
1mo
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CPU Cores Validation Senior Staff Engineer
Fort Collins, Colorado, United States
$178k-$268k/yr HybridFull Time
Experienced silicon validation engineer with strong programming (x86 assembly, C/C++, Perl, Ruby, Python), HDL knowledge (Verilog/System Verilog), DFT/JTAG familiarity, lab validation experience, and BS/MS in EE/CS/CSE.
x86 assembly, C, C++, Perl, Ruby, Python, Verilog HDL, System Verilog, JTAG -1149.x, BIST, LSSD/MuxD, RTL, DFT