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Sr. Process Integration Engineer
Seattle, Washington, United States
$114k-$161k/yr OnsiteFull Time
5+ YOEBachelor's in engineering/physics, 5+ years semiconductor process experience including backend/WLCSP/packaging, failure analysis using SEM/TEM/FIB/ion milling/AFM, DOE/SPC/yield analysis, JMP/Minitab/Python/MATLAB, Lean Six Sigma/8D, occasional international travel.
SEM, TEM, FIB, ion milling, AFM, JMP, Minitab, Python, MATLAB
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Principal Process Engineer-Etch (Camas, TX, US, 98607)
Camas, Washington, United States
$108k-$173k/yr OnsiteFull Time
5+ YOEBS or higher in Chemical Engineering, Chemistry, Electrical Engineering, Physics or Material Science; 5+ years ETCH process experience in high-volume semiconductor fab; ETCH principles and equipment knowledge; data analysis/DOE; multi-tasking and project management; cross-functional collaboration.
SPC, DOE, data analysis, Real-time monitoring
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Senior Process Engineer - Thin Film (Camas, WA, US, 98607)
Camas, Washington, United States
$91k-$135k/yr OnsiteFull Time
2+ YOEBS or higher in Chemical, Chemistry, Electrical, Physics, or Materials Science; 2+ years in high-volume semiconductor fab; CVD/PVD tools experience preferred; strong data analysis and multi-tasking skills; cross-functional collaboration.
SPC, Real-time monitoring, CVD, PVD, DOE, data analysis
3d
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Process Sustaining Engineering Technician 1
Camas, Washington, United States
$23-$29/hr OnsiteFull Time
High school diploma or GED required; familiarity with semiconductor processing, SPC, EM operations, problem solving, and strong communication; adaptable and able to learn technical skills.
DMR, SPC, ERF, DOE, AMAT Producer
3w
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Senior Silicon Physical Design and Layout Engineer
Austin or San Diego or Renton or Seattle or California or Texas
$198k-$277k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
7+ YOEB.S. in EE/CE or related, 7+ years ASIC physical design and layout experience, expertise in digital and analog layout, industry-standard EDA tools (Cadence, Synopsys, Mentor), timing closure, power analysis, and semiconductor process knowledge.
Cadence, Synopsys, Mentor