34 vlsi jobs at 14 companies in Texas
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VLSI Design Engineer
Austin, Texas, United States
OnsiteFull Time
5+ YOE5+ years ASIC/VLSI digital design experience; strong Verilog/SystemVerilog; familiarity with simulation and verification methodologies, synthesis/timing analysis, and protocol implementation; BS/MS in EE/CE.
Verilog, SystemVerilog, Python, Perl, TCL, EDA tools, SDC, CDC, Linting, Formal Verification
1mo
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VLSI RTL design engineer
Fort Collins or Austin
$106k-$183k/yr HybridFull Time
3+ YOEBS/MS in EE/CS/CSE with 3+ years hardware design experience; experience in Digital RTL design, Verilog HDL, SRAM/Coherent Cache/NOC, scripting; strong communication and problem-solving skills.
Verilog HDL
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Software R&D Engineer, VLSI Physical Design - New College Grad 2026
Austin, Texas, United States
$116k-$219k/yr OnsiteFull Time
Master's or PhD in EE/CS (or equivalent), experience developing VLSI physical-design algorithms in C++, familiarity with timing optimization concepts and implementation tools (ICC2, Innovus, PrimeTime, Tempus, StarRC), and scripting in Perl/Tcl/Python.
C++, C++14, ICC2, Innovus, PrimeTime, Tempus, StarRC, Perl, Tcl, Python, Graph Neural Networks (GNNs)
2mo
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CPU Memory Design Engineer
Austin, Texas, United States
$164k-$269k/yr HybridFull Time
6+ YOEBachelor's +6+ yrs or Master's +5+ yrs or PhD +2+ yrs; CMOS design; VLSI; memory design; power/performance/area trade-offs.
CMOS, VLSI, EDA tools, signal integrity
1mo
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ASIC III - AMZ9802543
Austin, Texas, United States
$174k-$215k/yr OnsiteFull Time
8+ YOEMaster's in Electrical Engineering with 8+ years (or bachelor's +10 years) and experience in DFRT/DFT, HTOL hardware design, Si failure analysis, reliability stress/statistics, VLSI, IC testing and fab production flows.
DFQR, DFT, HTOL, LU, ESD, VLSI
2mo
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ICT (In-Circuit-Test) Engineer
Dallas or Houston
$45k-$121k/yr OnsiteFull Time
3+ YOE3+ years VLSI experience; perform VLSI system development, module/IP verification, UVM-based testbench creation, debugging, and client documentation; mandatory VLSI board design skill.
Universal Verification Methodology (UVM), SharePoint, JIRA, Trend Nxt
3w
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Product Engineer II (EMIR / PDN Analysis & Power Integrity)
Austin, Texas, United States
$102k-$189k/yr OnsiteFull Time
3+ YOEBachelor's in Electrical/VLSI (or Master's),3+ years experience,knowledge of digital/VLSI,power/IR analysis,circuit design,placement and routing flows;Python or TCL scripting;strong communication and problem solving.
Python, TCL
3w
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Product Engineer II (EMIR / PDN Analysis & Power Integrity)
Austin, Texas, United States
$102k-$189k/yr OnsiteFull Time
3+ YOEBachelor�s or Master�s in Electrical/VLSI Engineering, 3+ years related experience (or Masters), skills in digital/VLSI/CMOS design, power IR drop analysis, placement-and-routing flows, IR/EM debugging, Python or TCL, strong communication.
Python, TCL
5d
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Digital Verification
Austin, Texas, United States
$121k/yr OnsiteFull Time
Master’s degree in electrical, computer, or electronics engineering; knowledge of C/Python, Verilog, SystemVerilog, UVM, computer architecture, digital design, VLSI, debugging, and coverage analysis.
C, Python, Verilog, SystemVerilog, Universal Verification Methodology (UVM), Make
4d
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Senior Layout Designer
Richardson, Texas, United States
OnsiteFull Time
2+ YOERequires a B.S. in electrical engineering with 2+ years or an M.S. with 1+ years, CMOS and VLSI coursework, physical circuit layout experience, Cadence Virtuoso, and strong analytical skills.
Cadence Virtuoso, Calibre, LVS, DRC
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Digital Design Engineer I
Austin, Texas, United States
$79k-$146k/yr HybridFull Time
Bachelor's degree in EE/CE or related field, academic/project experience in VLSI or digital IC design, familiarity with RTL design and Verilog/SystemVerilog, strong problem-solving and collaboration skills.
Verilog, SystemVerilog, EDA tools, simulation tools
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Digital Design Engineer I
Austin, Texas, United States
$79k-$146k/yr HybridFull Time
Degree in electrical/computer engineering or related field, academic/project experience in VLSI or digital IC design, knowledge of RTL, finite state machines, timing, Verilog/SystemVerilog, strong debugging and communication skills.
Verilog, SystemVerilog, EDA tools, simulation tools, verification environments
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Principal Engineer – Multi-Physics Sign-off (Timing, PDN & Thermal)
San Jose or Austin or San Diego
$263k-$355k/yr HybridFull Time
5+ YOEVLSI knowledge with 5+ years system-level experience; hands-on 3DIC/2.5D design and signoff; strong scripting, flow ownership, and cross-team collaboration; familiarity with EDA tool qualification and multiphysics/thermal analysis.
Cadence Integrity 3D-IC, Synopsys 3DIC Compiler, Cadence Celsius Thermal Solver, Ansys Icepak, Ansys RHSC-ET
2mo
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Components Engineer, Sr. (BT-26118)
Houston or Pasadena
$140k-$165k/yr RemoteFull Time, Part Time
12+ YOEBachelor's in EE/physics/materials/applied math, US citizen or permanent resident, 12+ years components/parts engineering experience (RF, photonics, VLSI, magnetics, COTS), strong reliability and test expertise, Microsoft Office/Teams skills, must pass background and drug screens.
Microsoft Office Suite, Microsoft Word, Microsoft Excel, Microsoft PowerPoint, Microsoft Teams, computer-aided engineering tools
3d
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Business Development Director for Hitech & Telecom
Plano, Texas, United States
$200k-$250k/yr OnsiteFull Time
13+ YOERequires 13+ years of industry experience, including 5+ years in business development selling large-scale technology solutions, with expertise in hi-tech, telecom, consumer electronics, proposals, and complex deals.
IoT, Edge to Cloud, Hardware, Firmware, VLSI
3mo
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Custom Silicon Management Analog Design Lead - Sensors
Austin or Cupertino or San Diego
OnsiteFull Time
10+ YOEBS degree; experience in analog/mixed-signal design; ability to lead across teams and vendors.
Analog circuit design, Mixed-signal design, VLSI, ECAD
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