Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it! Join us to help deliver the next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Description
As a CPU Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: - Work closely with architecture and RTL designers on verifying the functionality correctness of the design - Develop and lead test plan and test environments - Develop complex tests in assembly, C, or vectors according to test plans - Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered - Develop checkers or C-base transactor to verify the design
Minimum Qualifications
- BS EE/CE or equivalent experience.
- Be an outstanding teammate with excellent communication skills and the desire to address diverse challenges.
Preferred Qualifications
- We're looking for someone who is well-rounded in all aspects of verification.
- Knowledge of CPU & SOC architecture/design & in-depth knowledge of verification flow.
- Thrive by demonstrating your expertise with low-level programming of sophisticated computer systems in C/C++/assembly.
- Being already familiar verification environments such as UVM and System Verilog will come a long way with us.
- Apply knowledge of industry standard interfaces and have a deep understanding of Verilog, Verilog simulator, and debuggers.
- Have a detailed understanding of the constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy.
- Even better if you also have knowledge of formal, hardware acceleration.
