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205 analog design engineer jobs at 89 companies in San Jose, CA

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Principal Analog Design Engineer
Irvine or San Jose or Vancouver or Ottawa
$150k-$250k/yr OnsiteFull Time
Celero Communications
Celero Communications: Developing high-performance coherent DSP technology for AI connectivity.
5+ YOEMaster’s or PhD in electrical engineering or a related field, 5+ years of experience, strong analog design fundamentals, and experience with Virtuoso, Spectre, ADE, and advanced CMOS verification flows.
Virtuoso, Spectre, ADE, EMX, Momentum, HFSS, CMOS, FinFET, PLL, VCOs, VGA, CTLE, DRV, LDOs
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3mo
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Principal Analog Design Engineer
San Jose or United States
$175k-$350k/yr HybridFull Time
TylSemi
TylSemi: Building chiplet-native infrastructure for high-performance AI systems.
5+ YOE5+ years analog/mixed-signal IC design experience; strong analog fundamentals; proficiency with Spectre, HSPICE, ADE; post-layout closure and debug skills; cross-functional communication.
Spectre, HSPICE, ADE, waveform/debug tooling
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3w
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Principal Analog Design Engineer
Richardson or San Jose
$170k-$222k/yr HybridFull Time
Qorvo
QorvoNASDAQ: QRVO: Designs and manufactures radio frequency and power semiconductor solutions.
12+ YOEBachelor's in Electrical Engineering,12+ years semiconductor experience,8+ years analog/mixed-signal IC design with DC-DC converter expertise,EMIR/EDA tool experience,ability to communicate technical concepts.
EMIR, Cadence Virtuoso, Simplis, ADS
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4d
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SMTS Analog Design Engineer
Santa Clara, California, United States
$165k-$235k/yr RemoteFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
4+ YOEMaster's in electrical, computer, or electronics engineering plus 4 years of related experience, or bachelor's plus 6 years. Requires analog/mixed-signal design, high-speed interfaces, Linux, and C, C++, or Python.
ASIC, DDR, GDDR, HBM, SERDES, Unix, Linux, C, C++, Python
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1mo
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Senior Analog Design Engineer
San Jose, California, United States
$120k-$180k/yr OnsiteFull Time
Credo Semiconductor
Credo SemiconductorNASDAQ: CRDO: Designing high-speed semiconductor connectivity solutions for data infrastructure.
5+ YOEM.S. or Ph.D. in Electrical Engineering, 5+ years IC development with advanced CMOS/FinFET, strong analog/mixed-signal circuit knowledge, proficiency with Cadence Virtuoso, Synopsys Custom Compiler, MATLAB, Verilog, and hands-on design/layout/verification experience.
Cadence Virtuoso, Synopsys Custom Compiler, MATLAB, Verilog
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1w
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iPhone Analog Design Engineer
Cupertino, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Familiarity with portable, low-power consumer electronics, preferably in a high-volume, high-quality product environment; experience designing analog function blocks and subsystems.
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2mo
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Principal Engineer-Analog Design
San Jose, California, United States
$73k-$163k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
10+ YOEBS in electrical engineering; 10+ years analog design; 5+ years mixed-signal CMOS; Cadence tools; nano CMOS FinFET experience.
Cadence, Circuit simulators
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2mo
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Principal Engineer, Analog Design
San Jose, California, United States
$131k-$187k/yr OnsiteFull Time
Lumentum
LumentumNASDAQ: LITE: Manufacturer of optical and photonic components for global networks.
10+ YOEMaster's or PhD in EE, 10+ years analog/mixed-signal IC design experience, expertise in high-speed building blocks, EDA tool proficiency, silicon validation and lab characterization, and mentoring experience.
SPICE, Cadence Virtuoso, Spectre, AMS simulation environments, oscilloscope, spectrum analyzer, network analyzer, arbitrary waveform generator
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Senior Engineer, Analog Design Engineering
San Jose, California, United States
$157k-$190k/yr HybridFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
2+ YOEMaster's in EE or related field, 2 years analog design experience, expertise with transistor-level design and Cadence tools, silicon evaluation and lab test equipment, and participation in product development.
Cadence, spectrum analyzer, oscilloscope, signal generator, CMOS, BCD
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2mo
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Analog Design Engineer
Santa Clara, California, United States
$157k-$160k/yr OnsiteFull Time
OMNIVISION
OMNIVISIONHong Kong Stock Exchange: 0501: Designs and develops advanced imaging and display semiconductor solutions.
Master's in EE/CE/Electro-Optics required; experience with Cadence Virtuoso, AFS/Empyrean ALPS/NanoSpice simulations, Siemens Caliber DRC/LVS, MATLAB and Microsoft Excel; layout, floorplanning, ADC/DAC and mixed-signal design.
Cadence Virtuoso, Cadence, Analog FastSPICE (AFS), Empyrean ALPS, NanoSpice, Siemens Caliber, MATLAB, Microsoft Excel
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2w
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Analog Circuit Design Engineer
Santa Clara or Folsom
$122k-$232k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
2+ YOEDegree in EE/CE with 2–3+ years VLSI analog design experience, familiarity with Synopsys and Cadence, small-signal analysis, high-speed IO and power delivery concepts, Matlab and scripting, and strong collaboration and documentation skills.
Synopsys, Cadence, Matlab, VS Code, Python, GitHub Copilot, oscilloscopes, signal generators
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4w
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Principal Analog Design Engineer
San Jose, California, United States
$191k-$262k/yr HybridFull Time
Infineon Technologies
Infineon TechnologiesFrankfurt Stock Exchange: IFX: Designs and manufactures semiconductors for power and IoT systems.
6+ YOEPhD+6 years or MS EE+8 years in analog/mixed-signal design; strong experience with ADC/DAC, amplifiers, PLLs, regulators, high-speed and FinFET design; excellent communication.
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Analog IC Design Engineer, AMS
Boston or Mountain View
$190k-$230k/yr HybridFull Time
Lightmatter
Lightmatter: Develops photonic processors and interconnects for AI data centers
5+ YOEMS with 8+ years or Ph.D. with 5+ years designing analog and mixed-signal circuits; CMOS expertise, Cadence Design Environment experience, lab testing experience, and cross-functional collaboration skills.
Cadence Design Environment, CMOS, MZM
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16h
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Staff Analog Design Engineer - Process Migration & Verification
Santa Clara, California, United States
$155k-$250k/yr HybridFull Time
d-Matrix
d-Matrix: Develops high-performance semiconductor chips for generative AI inference.
5+ YOEBS or MS in Electrical Engineering, 5+ years of analog or mixed-signal design, process-node migration, working-silicon characterization, verification methodology, Cadence tools, and scripting proficiency.
Cadence Virtuoso, Spectre, ADE, Python, SKILL, TCL, Verilog-A, UCIe, BoW, IBIS-AMI
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5d
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Principal Analog IC Design Engineer, High Speed SerDes
San Jose, California, United States
$137k-$254k/yr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
7+ YOEMinimum 7 years in CMOS SerDes or high-speed I/O IC design; MS or PhD in electrical engineering; analog/mixed-signal design, verification, CAD tools, and circuit simulation experience required.
CAD, Cadence
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2mo
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Analog/RF IC Layout Design Engineer
Colorado Springs or Santa Clara
$120k-$200k/yr OnsiteFull Time
Keysight Technologies
Keysight TechnologiesNYSE: KEYS: Provides electronic design, test, and simulation software and hardware.
7+ YOEBS/MS in Electrical Engineering; 7+ years analog IC layout; 5+ years Cadence Virtuoso Layout XL; DRC/LVS/meter densities; BiCMOS 130 nm+; device matching knowledge; multi-design capability; SVN/Cliosoft/SOS experience; strong teamwork.
Cadence Virtuoso, DRC, LVS, Mentor Calibre, OCEAN, Scripting
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1mo
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Senior Director Analog IC Design
San Jose, California, United States
$294k/yr OnsiteFull Time
Lattice Semiconductor
Lattice SemiconductorNASDAQ: LSCC: Designs and sells low-power programmable logic devices and chips.
Extensive analog/mixed-signal design experience, leadership of engineering teams, expertise in FinFET technologies and transistor-level techniques, hands-on AMS design and post-silicon characterization, BS/MS/PhD in EE.
Cadence, Virtuoso, Spectre
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3mo
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Senior Analog / Mixed-Signal IC Design Engineer
Palo Alto, California, United States
$145k-$165k/yr OnsiteFull Time
PsiQuantum
PsiQuantum: Builds fault-tolerant quantum computers using silicon photonics technology.
Experienced analog/mixed-signal IC design engineer with MS/PhD in EE; CMOS/SiGe, SPICE tools, and lab bring-up experience.
Spectre, HSPICE, Cadence Virtuoso, SystemVerilog RNM, Verilog-A
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3w
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Electrical Design Engineer (Analog PCB design)
Milpitas, California, United States
$118k-$200k/yr OnsiteFull Time
KLA
KLANASDAQ: KLAC: Provides process control and yield management for semiconductor manufacturing.
0+ YOEExperience in analog/mixed-signal and PCB design, OrCAD/Cad tools, low-noise analog, signal/power integrity, EE lab bring-up, PCBA troubleshooting, ADC/DAC and sensor work.
OrCAD, Cad tools, EE LAB tools, FPGA
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2mo
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Principal Engineer, Analog/Mixed-Signal Design
San Jose, California, United States
$200k-$260k/yr OnsiteFull Time
Ayar Labs
Ayar Labs: Develops optical interconnect technology for high-speed data movement.
12+ YOE12+ years in analog/mixed-signal design; MS/PhD in EE; production tapeouts in FinFET CMOS; Cadence experience; 50Gb/s or higher and RF 25GHz+ experience.
Cadence, ADE, Spectre
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