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Lead ASIC Digital Design Engineer
Annapolis Junction or Telework or Boise or Salt Lake City or Bloomington
$177k-$187k/yr RemoteFull Time
8+ YOE8+ years ASIC/FPGA RTL design experience, ASIC tape-out and timing-closure experience, familiarity with FinFET nodes and commercial foundry flows, EDA tool and JIRA proficiency, strong RTL and microarchitecture skills.
JIRA, Microsoft Office
6d
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Lead ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$177k-$187k/yr RemoteFull Time
8+ YOEBachelor's in ECE or related plus 8+ years (or Master's plus 6+ years), strong RTL/ASIC/FPGA design experience, ASIC tape-out and timing closure experience, ability to obtain DoD Secret clearance, proficiency with JIRA and Microsoft Office.
JIRA, Microsoft Office
1w
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (Master's+3 acceptable), U.S. citizenship, ability to obtain DoD Secret clearance, 5–8+ years ASIC/FPGA RTL design experience, formal verification and verification-process experience, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office, STA
1w
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in ECE or related and 5+ years experience (or Master's+3); US citizenship and ability to obtain DoD Secret clearance; strong RTL/ASIC design and verification experience.
JIRA, Microsoft Office
1mo
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Senior ASIC Physical Design Engineer
Laurel, Maryland, United States
$105k-$290k/yr OnsiteFull Time
6+ YOEAssociate’s degree (or equivalent) in a technical field, 6+ years back-end ASIC design, skilled with Cadence back-end tools and Siemens Calibre, able to obtain Interim Secret and Secret clearance, US citizenship required.
Cadence ASIC design tools, Cadence Virtuoso, Siemens Calibre, Siemens ASIC design tools, DRC, DRC+, MCD, LVS
1mo
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PCB Layout Hardware Design Engineer (GA-2/3)
Annapolis Junction or Fort Meade
$220k-$280k/yr OnsiteFull Time
7+ YOETS/SCI with polygraph required; 7+ years experience in integrated circuit/microelectronic design or reverse engineering; PCB layout, schematic capture, HDI, ASIC/FPGA P&R experience; bachelor\u0002s in EE/CE (or 5 yrs additional experience).
ASIC, FPGA, place-and-route (P&R), CDES, computer-aided design
2mo
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FPGA Engineer
Exton, Pennsylvania, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering; 2+ years FPGA/ASIC in regulated environments; proficient in Verilog/VHDL; Xilinx Vivado; DO-254 familiarity; hardware debugging; cross-functional collaboration
Verilog, VHDL, Xilinx Vivado, RTL simulation, ModelSim/Questa, DO-254 knowledge, I2C, SPI, JTAG, Ethernet, PCIe
1w
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FPGA Verification Engineer, Bespoke Solutions
Jessup or Arlington or Herndon
$136k-$184k/yr OnsiteFull Time
4+ YOERequires US citizenship and active TS/SCI clearance; Bachelor's in electrical/communications engineering; 3+ years design and 4+ years verification experience with SystemVerilog/UVM; FPGA/ASIC verification experience.
SystemVerilog, UVM, Xilinx Vivado, AMD Vivado, Synopsys VCS, Cadence Xcelium, SystemVerilog Assertions (SVA)
2mo
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On-Site Rad-Hard Electrical Engineer (Hill AFB, Utah)
Laurel or Ogden
$100k-$245k/yr OnsiteFull Time
2+ YOEB.S. in Electrical Engineering or Physics with 2+ years of relevant experience; rad-hard electronics; radiation environments knowledge; strong communication; willing to relocate and travel; eligible for security clearance.
SPICE modeling, ASIC design, PWB design, radiation hardened electronics
1w
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FPGA Verification Engineer Level 5 - Linthicum
Linthicum, Maryland, United States
$186k-$279k/yr OnsiteFull Time
12+ YOEBachelor's+12 years (or Master's+10, PhD+7) in EE/CE/CS, expertise in FPGA/ASIC verification, VUnit, hardware description languages, CI/CD and leadership experience; U.S. citizenship and ability to obtain TS/SCI required.
SystemVerilog, Verilog, VHDL, VUnit, Synopsys, Mentor Graphics, Jenkins, Python, Tcl, Makefile, Xilinx, MicroChip
1mo
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Digital Design Engineer - Level 5 - Linthicum
Linthicum, Maryland, United States
$186k-$279k/yr OnsiteFull Time
7+ YOEDegree in EE/CE/CS (Bachelor’s+12yr or Master’s+10yr or PhD+7yr), FPGA/ASIC/HDL (Verilog, VHDL) experience, FPGA IDEs (Xilinx, Microsemi), test/verification and RTL debug, mentoring skills, U.S. citizenship and ability to obtain Top Secret clearance.
Xilinx, Microsemi, HDL, Verilog, VHDL, RTL
2w
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Manager Digital Engineering 2
Linthicum, Maryland, United States
$154k-$231k/yr OnsiteFull Time
8+ YOE5+ MgmtU.S. citizen with active DoD Secret clearance, 8+ years digital/FPGA design experience, 5+ years people/project management, STEM degree (BS/MS/PhD) as specified, SAP eligibility, EM engineering leadership and mentoring skills.
FPGA, ASIC, SoC
1w
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Engineering and Physical Sciences Researcher- Mid to Experienced Level (Maryland)
Fort Meade, Maryland, United States
$105k-$193k/yr OnsiteFull Time
3+ YOEDegree in engineering, physics/astronomy, or related technical field; relevant research or engineering experience; publication and collaboration record; demonstrated technical skills in device/ASIC/architecture research.
Verilog, RTL, FPGA, Cadence, Synopsys