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Senior ASIC/FPGA Verification Engineer (Onsite)
Fort Wayne, Indiana, United States
$87k-$165k/yr OnsiteFull Time
5+ YOERequires U.S. citizenship and active transferable DoD Secret clearance, STEM degree with 5+ years experience (or advanced degree with 3+ years), expertise in RTL verification using SystemVerilog/OVM/UVM, VHDL/Verilog, and revision control tools.
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
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Principal FPGA/ASIC Verification Engineer (Onsite)
Fort Wayne, Indiana, United States
$108k-$205k/yr OnsiteFull Time
5+ YOEU.S. citizen with active transferable DoD Secret clearance, STEM degree plus 8+ years (or advanced degree plus 5+ years), experience with VHDL/Verilog/SystemVerilog, UVM/OVM, RTL verification, Git/Subversion, and mentoring technical teams.
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, Unix, Linux, C, C++, Python, Perl, shell, QuestaSim, Synplify, Quartus, Vivado
4w
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Senior Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, Indiana, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEU.S. citizenship and active DoD Secret clearance required. Typically requires a STEM degree (Bachelor's +5 years or Advanced Degree +3 years). Experience with RTL coding (Verilog/VHDL), System Verilog testbenches, FPGA/ASIC design, timing closure, and verification tools. Familiarity with Git/Subversion, Unix, and C/C++ or Perl.
Verilog, VHDL, System Verilog, ModelSim, Synplify, Quartus, Vivado, Git, Subversion, Unix, C/C++, Perl
3w
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Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, Indiana, United States
$132k-$252k/yr OnsiteFull Time
10+ YOESTEM degree with 10+ years experience (or advanced degree with 7+ years). Must be U.S. citizen, able to obtain/maintain DoD Secret clearance. Hands-on RTL design (VHDL/Verilog), RTL verification, timing closure, ASIC/FPGA tool proficiency.
VHDL, Verilog, SystemVerilog, ModelSim, Synplify, Quartus, Vivado, QuestaSim, Unix, Linux, C, C++, Python, Perl, shell
1mo
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Principal FPGA Engineer
Fort Wayne, Indiana, United States
$108k-$205k/yr OnsiteFull Time
8+ YOEU.S. citizenship and active DoD Secret clearance required. Typically requires a STEM degree and 8+ years experience in FPGA/ASIC design or verification with VHDL/Verilog/SystemVerilog and FPGA toolflows; leadership and lab integration experience.
AMD Vivado, Altera Quartus Prime Pro, Libero, VHDL, Verilog, SystemVerilog, UVM, Veloce, High Level Synthesis (HLS), Vitis AI, FINN, ARM, Microblaze, NIOS, Earned Value, Agile Execution
1mo
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FPGA Engineer II
Fort Wayne, Indiana, United States
$69k-$131k/yr OnsiteFull Time
2+ YOEActive U.S. citizenship and DoD Secret clearance required, STEM degree typically required, minimum 2 years relevant FPGA/ASIC experience with VHDL/Verilog/System Verilog and vendor tools (Vivado, Quartus, Libero); lab integration, verification, and lifecycle support experience.
AMD (Xilinx), Altera, Microchip (Microsemi), AMD Vivado, Altera Quartus Prime Pro, Libero, VHDL, Verilog, System Verilog, UVM, High Level Synthesis (HLS), ARM, Microblaze, NIOS
1mo
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Senior FPGA Design Engineer
Fort Wayne, Indiana, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEBachelor's degree in STEM and 5+ years FPGA/ASIC experience (VHDL/Verilog/SystemVerilog). Experience with AMD/Xilinx, Altera, or Microchip devices and Vivado/Quartus/Libero, lab integration/debug, timing closure, and source control. Active DoD Secret clearance and U.S. citizenship required.
AMD (Xilinx), Altera, Microchip (Microsemi), AMD Vivado, Altera Quartus Prime Pro, Libero, VHDL, Verilog, SystemVerilog, UVM, High Level Synthesis (HLS), ARM, MicroBlaze, NIOS, Earned Value, Agile Execution
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Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Fort Wayne, Indiana, United States
$69k-$131k/yr OnsiteFull Time
Master's in EE/CE or related STEM, ability to obtain DoD Secret clearance (U.S. citizenship), FPGA/ASIC design or verification experience (VHDL/Verilog/SystemVerilog), hands-on lab integration/debug, and experience with AMD/Altera/Microchip toolchains.
VHDL, Verilog, SystemVerilog, AMD Vivado, Altera Quartus Prime Pro, Libero, High Level Synthesis (HLS), UVM, ARM, Microblaze, NIOS