4d
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Lead ASIC Digital Design Engineer
Annapolis Junction or Telework or Boise or Salt Lake City or Bloomington
$177k-$187k/yr RemoteFull Time
8+ YOE8+ years ASIC/FPGA RTL design experience, ASIC tape-out and timing-closure experience, familiarity with FinFET nodes and commercial foundry flows, EDA tool and JIRA proficiency, strong RTL and microarchitecture skills.
JIRA, Microsoft Office
5d
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in ECE or related and 5+ years experience (or Master's+3); US citizenship and ability to obtain DoD Secret clearance; strong RTL/ASIC design and verification experience.
JIRA, Microsoft Office
1mo
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Senior ASIC Physical Design Engineer
Laurel, Maryland, United States
$105k-$290k/yr OnsiteFull Time
6+ YOEAssociate’s degree (or equivalent) in a technical field, 6+ years back-end ASIC design, skilled with Cadence back-end tools and Siemens Calibre, able to obtain Interim Secret and Secret clearance, US citizenship required.
Cadence ASIC design tools, Cadence Virtuoso, Siemens Calibre, Siemens ASIC design tools, DRC, DRC+, MCD, LVS
3w
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
5+ YOEBachelor's in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency in SystemVerilog/UVM, OOP principles, coverage and code-coverage closure, waveform debug, revision control, and Linux.
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python
3w
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
5+ YOEBachelor's degree in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency with SystemVerilog/UVM, SV Assertions, revision control (svn/cvs/git), Linux, and waveform/debug tools; ability to obtain U.S. Secret clearance (U.S. citizenship required).
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python, ARM, JESD204C, PCIe, Ethernet
2mo
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Electrical Engineer FPGA/ASIC - Level 3/4 - Dulles
Dulles, Virginia, United States
$114k-$171k/yr OnsiteFull Time
5+ YOEBS with 5+ yrs or MS with 3+ yrs (Level 3) or PhD with 1+ yrs; SCI clearance; VHDL experience; FPGA design flow expertise; aerospace domain knowledge; leadership experience.
VHDL, RTL, Synthesis, Place and Route, Timing Analysis, Power Analysis, Vivado, QuestaSim, MATLAB, Simulink
1mo
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PCB Layout Hardware Design Engineer (GA-2/3)
Annapolis Junction or Fort Meade
$220k-$280k/yr OnsiteFull Time
7+ YOETS/SCI with polygraph required; 7+ years experience in integrated circuit/microelectronic design or reverse engineering; PCB layout, schematic capture, HDI, ASIC/FPGA P&R experience; bachelor\u0002s in EE/CE (or 5 yrs additional experience).
ASIC, FPGA, place-and-route (P&R), CDES, computer-aided design
1w
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FPGA Verification Engineer, Bespoke Solutions
Jessup or Arlington or Herndon
$136k-$184k/yr OnsiteFull Time
4+ YOERequires US citizenship and active TS/SCI clearance; Bachelor's in electrical/communications engineering; 3+ years design and 4+ years verification experience with SystemVerilog/UVM; FPGA/ASIC verification experience.
SystemVerilog, UVM, Xilinx Vivado, AMD Vivado, Synopsys VCS, Cadence Xcelium, SystemVerilog Assertions (SVA)
2mo
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On-Site Rad-Hard Electrical Engineer (Hill AFB, Utah)
Laurel or Ogden
$100k-$245k/yr OnsiteFull Time
2+ YOEB.S. in Electrical Engineering or Physics with 2+ years of relevant experience; rad-hard electronics; radiation environments knowledge; strong communication; willing to relocate and travel; eligible for security clearance.
SPICE modeling, ASIC design, PWB design, radiation hardened electronics
4w
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Senior Electronics & Computer Hardware Engineer – Autonomous Systems
Fort Belvoir, Virginia, United States
$161k-$251k/yr OnsiteFull Time
10+ YOEBachelor's in EE/CE or related (Master's preferred), 10+ years hardware engineering experience focused on autonomous systems, experience with navigation sensors, RF/telemetry, PCB lifecycle, MIL-STD familiarity, US citizen with active Top Secret/SCI.
GPS/GNSS, IMUs, LiDAR, radar, electro-optical/infrared (EO/IR), RF systems, data links, embedded communication interfaces, FPGA, ASIC, MIL-STD-461, MIL-STD-810
1w
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FPGA Verification Engineer Level 5 - Linthicum
Linthicum, Maryland, United States
$186k-$279k/yr OnsiteFull Time
12+ YOEBachelor's+12 years (or Master's+10, PhD+7) in EE/CE/CS, expertise in FPGA/ASIC verification, VUnit, hardware description languages, CI/CD and leadership experience; U.S. citizenship and ability to obtain TS/SCI required.
SystemVerilog, Verilog, VHDL, VUnit, Synopsys, Mentor Graphics, Jenkins, Python, Tcl, Makefile, Xilinx, MicroChip
1mo
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Digital Design Engineer - Level 5 - Linthicum
Linthicum, Maryland, United States
$186k-$279k/yr OnsiteFull Time
7+ YOEDegree in EE/CE/CS (Bachelor’s+12yr or Master’s+10yr or PhD+7yr), FPGA/ASIC/HDL (Verilog, VHDL) experience, FPGA IDEs (Xilinx, Microsemi), test/verification and RTL debug, mentoring skills, U.S. citizenship and ability to obtain Top Secret clearance.
Xilinx, Microsemi, HDL, Verilog, VHDL, RTL
2w
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Manager Digital Engineering 2
Linthicum, Maryland, United States
$154k-$231k/yr OnsiteFull Time
8+ YOE5+ MgmtU.S. citizen with active DoD Secret clearance, 8+ years digital/FPGA design experience, 5+ years people/project management, STEM degree (BS/MS/PhD) as specified, SAP eligibility, EM engineering leadership and mentoring skills.
FPGA, ASIC, SoC
1w
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Digital Design SME
McLean, Virginia, United States
$176k-$282k/yr OnsiteFull Time
10+ YOEActive TS/SCI with poly, 10+ years relevant experience (Bachelor's+12yrs or Master's+10yrs alternative), expertise in digital/ASIC/microprocessor design, EDA tools, Verilog/VHDL/TCL, and ability to lead projects and advise stakeholders.
Electronic Design Automation (EDA), Verilog, VHDL, Tool Command Language (TCL)
1w
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Digital Design SME
McLean, Virginia, United States
$176k-$282k/yr OnsiteFull Time
10+ YOEActive TS/SCI with Polygraph; 10+ years technical experience (Master's+10yrs or Bachelor's+12yrs); expertise in ASIC/microprocessor design, EDA tool flows, Verilog/VHDL/TCL, foundry processes; ability to train teams and travel up to 25%.
Electronic Design Automation (EDA), Verilog, VHDL, Tool Command Language (TCL)
4d
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Engineering and Physical Sciences Researcher- Mid to Experienced Level (Maryland)
Fort Meade, Maryland, United States
$105k-$193k/yr OnsiteFull Time
3+ YOEDegree in engineering, physics/astronomy, or related technical field; relevant research or engineering experience; publication and collaboration record; demonstrated technical skills in device/ASIC/architecture research.
Verilog, RTL, FPGA, Cadence, Synopsys
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