Battelle: Conducts scientific research and manages national laboratories for clients.
0+ YOEBachelor's or Master's in EE/CS or equivalent; experience in IC and FPGA design flows, RTL (VHDL/Verilog/SystemVerilog), hardware validation, and EDA tools; US citizenship and eligibility for Top Secret clearance.
VHDL, Verilog, SystemVerilog, Cadence, Synopsys, Siemens, Xilinx Vivado, Altera Quartus, Questa, Modelsim, Icarus Verilog, Verilator, Python, Matlab, Labview, C, C++, C#, Ghidra, IDA Pro, BinaryNinja, Focused Ion Beam (FIB), Scanning Electron Microscope (SEM)