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23 asic engineer jobs at 16 companies in Fairfield, CT

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Distinguished Engineer, ASIC (CONTRACT)
Burlington or New York or San Francisco
HybridContract, Temporary
Butterfly Network
Butterfly NetworkNYSE: BFLY: Handheld whole-body ultrasound scanners powered by semiconductor technology.
8+ YOE8–12+ years in digital IC/ASIC/SoC design; strong RTL SystemVerilog; tapeout experience; cross-functional collaboration.
SystemVerilog, Verilog, RTL, ASIC, SoC, clock_domain, PPA tools
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1w
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Senior Digital ASIC Design Engineer
Upton, New York, United States
$115k-$145k/yr OnsiteFull Time
Brookhaven National Laboratory
Brookhaven National Laboratory: Conducts multidisciplinary scientific research and operates national user facilities.
7+ YOEBachelor's in EE/CE/applied physics, 7+ years digital ASIC design, SystemVerilog/Verilog RTL, CAD/EDA tool experience, strong timing/CDC/low-power knowledge, and collaboration with mixed-signal, verification, and firmware teams.
SystemVerilog, Verilog, Cadence, Synopsys, Siemens, AXI, AHB, APB, Wishbone, I2C, SPI, JTAG, Tcl, Python, Perl, Make, shell
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1mo
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ASIC Technical Lead- DFT
San Jose or New York City or New York or Washington or Illinois or United States or Canada
$211k-$305k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
10+ YOEBachelor's or Master's in Electrical/Computer Engineering with 10+ years experience; expertise in JTAG, scan and BIST architectures, ATPG and EDA toolsets (TestMax, Tetramax, Tessent, PrimeTime); SystemVerilog/Verilog and post-silicon debug experience.
JTAG, ATPG, TestMax, Tetramax, Tessent, PrimeTime, System Verilog, Verilog
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3w
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Hardware Engineer (FPGA/ASIC)
New York, New York, United States
$300k/yr OnsiteInternship
Jane Street
Jane Street: Global quantitative trading firm and liquidity provider.
Comfortable with a programming language; experience with hardware description languages (VHDL, Verilog, Chisel, Pymtl) and FPGA/ASIC projects; familiar with vendor tools (Vivado, Quartus, Genus, Innovus).
Hardcaml, OCaml, VHDL, Verilog, Chisel, Pymtl, Vivado, Quartus, Genus, Innovus
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Development Engineer, Motors & ASIC (Danbury, CT, US, 06810)
Danbury, Connecticut, United States
$90k-$110k/yr OnsiteFull Time
Belimo
BelimoSIX Swiss Exchange: BEAN: Develops and manufactures control devices for HVAC systems.
3+ YOEEngineering role focused on drivetrain development for actuators; lead design verification; coordinate with cross-functional teams.
Motion control, Drive systems, Power electronics, Modeling, Simulation, Mechatronics
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2w
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Two Sigma Securities, Hardware Engineer
New York City, New York, United States
$165k-$300k/yr HybridFull Time
Two Sigma
Two Sigma: Systematic investment management and quantitative trading firm.
1+ YOEMinimum 1 year RTL design and verification experience, proficiency in SystemVerilog and Python, FPGA/ASIC knowledge, timing analysis, network protocol familiarity; C++ is a plus.
SystemVerilog, Python, FPGA, ASIC, C++
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Principal Engineer - Design
Hauppauge, New York, United States
$75k-$232k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
10+ YOEBachelor's in Electrical Engineering or equivalent,10+ years relevant experience,Verilog/System Verilog proficiency,experience with Ethernet/USB/PCIe and ASIC design/verification,strong problem solving and communication skills.
Verilog, System Verilog, Xilinx FPGA
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FPGA Engineer
Amsterdam or Chicago or London or New York City or Singapore
OnsiteFull Time
Headlands Technologies
Headlands Technologies: A global proprietary trading firm utilizing quantitative algorithms.
Professional FPGA/ASIC design and verification experience; SystemVerilog/Verilog/VHDL and C++; familiarity with EDA tools and scripting (TCL, Python, Bash); university degree in EE/CS/CE or related.
SystemVerilog, Verilog, VHDL, C++, TCL, Python, Bash, EDA
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4w
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RTL Design Engineer
New York City or Palo Alto or London
$205k-$285k/yr HybridFull Time
Normal Computing
Normal Computing: Building probabilistic AI and thermodynamic computing for semiconductor design.
Production SystemVerilog RTL experience, verification with UVM/cocotb/formal, taped-out silicon, ASIC/SoC design background, simulation and timing collaboration experience.
SystemVerilog, UVM, cocotb, formal, Chipyard, OpenTitan, CVA6, RISC-V
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Digital Modem Engineer
Austin or Chicago or New York City or London
$150k-$250k/yr OnsiteFull Time
Jump Trading
Jump Trading: Global proprietary trading firm specializing in algorithmic and high-frequency strategies
5+ YOE5+ years in digital modem design, modeling, and implementation; strong FPGA/ASIC knowledge; Python/C/C++/Matlab; MS/PhD in EE/CS or equivalent.
Python, C++, C, Matlab
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Failure Analysis Engineering Manager, GPU ASIC and PCBA Debug
Secaucus, New Jersey, United States
$129k-$221k/yr OnsiteFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
3+ MgmtProven people manager with 3+ years management experience; deep GPU ASIC and PCBA debug and failure analysis expertise; hands-on lab experience (oscilloscopes, logic analyzers); proficient in Python and shell; Windows/Linux experience; bachelor’s degree in EE/CE or related.
Python, Shell, Windows, Linux, Oscilloscope, Logic Analyzer
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2w
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Research Engineer, Chip Design RL (Reinforcement Learning)
San Francisco or New York City
$500k-$850k/yr HybridFull Time
Anthropic
Anthropic: Developing safe and reliable artificial intelligence systems.
Bachelor's or equivalent, expertise in ASIC/FPGA design and EDA tools, experience with RTL, verification (UVM, formal methods), physical design and tapeout experience; RL experience and tooling experience preferred.
EDA tools, UVM, formal methods, place-and-route
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Integrated Circuit Design Verification Engineer
Vancouver or Washington or California or New York City
$147k-$259k/yr OnsiteFull Time
Snap
SnapNYSE: SNAP: Provides visual messaging software and augmented reality wearable devices.
10+ YOE10+ years of ASIC design verification experience, BSEE or MSEE (or equivalent), strong UVM/SystemVerilog skills, Siemens Questa experience, scripting (TCL/Make/Perl/Python/Shell), and excellent communication.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
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Senior Network Solution Engineer (Weekend Coverage)
Santa Clara or Westford or Austin or Durham or Redmond or New York
$140k-$270k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOE5+ years software development (C, C++, Python, or Go) in the networking industry, 5+ years supporting in-field production network equipment, bachelor's degree or equivalent, experience with Linux NIC drivers/ASICs/firmware/network OS, expert Ethernet/IP knowledge.
C, C++, Python, Go, Linux, InfiniBand, NVLink, Spectrum-X
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2mo
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AI Research Engineer, Inference
New York City, New York, United States
$250k-$300k/yr OnsiteFull Time
Hudson River Trading
Hudson River Trading: A quantitative firm using technology to trade global financial markets.
2+ YOETwo+ years of experience building deep learning systems; strong low-level engineering in CUDA/Triton/CuTe or PyTorch/JAX; experience with inference optimization; familiarity with multiple domains.
CUDA, PyTorch, JAX, CuTe DSL, FPGA, ASIC, CUDA Graphs
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Inference Performance Engineer
New York, New York, United States
HybridFull Time
Material
Material: Specialized inference cloud platform for high-performance AI workloads.
BS in CS/EE or related field; proficiency in Rust/Go/Python/C++; knowledge of concurrency, tail latency; experience with model serving; GPU/ASIC programming; low-precision inference; profiling and benchmarking.
Rust, Go, Python, C++, vLLM, TensorRT-LLM, llama.cpp, CUDA, ROCm, Triton, TGI, SGLang, Nsight, perf
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