9 asic engineer jobs at 6 companies in Killingly Center, CT
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ASIC Physical Design Engineer
Maynard or Austin
$136k-$195k/yrHybridFull Time
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
5+ YOEBachelors in Engineering with 5+ years or Masters in Engineering with 3+ years in ASIC physical design; experience with floorplanning, place-and-route, STA, timing closure, DFT collaboration, scripting, and design flow optimization.
Senior Principal Engineer, Architecture ASIC / System
Toronto or Ottawa or Burlington or Irvine or Morrisville or Santa Clara or Westborough
$192k-$255k/yrOnsiteFull Time
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
14+ YOESenior architect with 14+ years in system architecture for SoC; expertise in interconnects, memory hierarchies, power management, security; strong technical leadership.
ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yrRemoteFull Time
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
Boston Engineering: Engineers products for the medical, defense, and industrial sectors.
4+ YOEBachelor's in electrical/computer engineering, 4+ years relevant experience, 3+ years embedded systems, proficiency in Embedded C/C++, RTOS, hardware-software integration, control systems, and communication protocols (I2C, SPI, UART, CAN).
HPR: Provides high-performance technology infrastructure for electronic trading markets.
3+ YOEBS/MS in related field, 3+ years FPGA/ASIC digital logic design, proficiency in SystemVerilog or VHDL, experience with simulation/debug tools (VCS, Verdi), Linux, strong debugging and communication skills.
RTXNYSE: RTX: RTX provides advanced aerospace and defense systems and services.
5+ YOEU.S. citizen able to obtain/maintain Secret clearance; STEM bachelor's degree typically required; minimum 5 years relevant FPGA/ASIC design or verification experience with VHDL/Verilog/SystemVerilog; experience with Xilinx or Microsemi devices and integration/debug.
Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yrOnsiteFull Time
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
3+ YOEBachelor's (or Master's/PhD) in CS/EE,3+ years (Master's) or 5+ years (Bachelor's) validating SoCs/ASICs, hands-on lab debugging, high-speed interfaces, scripting (Python/Perl/Shell), C/C++, and Linux.