8 asic engineer jobs at 3 companies in Middleton, ID
1w
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Lead ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$177k-$187k/yr RemoteFull Time
8+ YOEBachelor's in ECE or related plus 8+ years (or Master's plus 6+ years), strong RTL/ASIC/FPGA design experience, ASIC tape-out and timing closure experience, ability to obtain DoD Secret clearance, proficiency with JIRA and Microsoft Office.
JIRA, Microsoft Office
2w
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Senior Principal ASIC FPGA Engineer
Boise, Idaho, United States
$191k-$212k/yr HybridFull Time
10+ YOEBachelor's in EE/CE (or Master's) plus 10+ years (or 8+ with Master's), DoD Secret clearance, 10–15+ years ASIC/FPGA RTL design experience, full tape-out lifecycle, FinFET/node experience, EDA and verification expertise, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office
1w
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Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (Master's+3 acceptable), U.S. citizenship, ability to obtain DoD Secret clearance, 5–8+ years ASIC/FPGA RTL design experience, formal verification and verification-process experience, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office, STA
1mo
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Principal Compute Pathfinding ASIC Design
Boise, Idaho, United States
OnsiteFull Time
12+ YOEMaster's in ECE or Bachelor's with 12+ years ASIC architecture/build experience; extensive Verilog/SystemVerilog, logic design, synthesis, system-level evaluation, and strong analytical and communication skills.
Verilog, SystemVerilog, High-Level Synthesis (HLS)
3mo
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HIG Product Engineer - Media Health
Boise, Idaho, United States
OnsiteFull Time
Master's degree or equivalent in Computer/Electrical Engineering, experience in digital circuit design, ASIC testing, Python and C programming, BIST APG programming, Linux, and hands-on bench testing for memory products.
Probe, ATE, Python, C, BIST APG, Linux, JMP, SPICE, Verilog, ASIC
3mo
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HIG Product Engineer - Media Health
Boise, Idaho, United States
OnsiteFull Time
Master's in Computer or Electrical Engineering or related field; digital circuit design, ASIC testing with scan tools, Python and C; Linux; bench testing; BIST/APG memory testing.
Python, C, Linux, Verilog, SPICE, JMP
1w
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Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yr OnsiteFull Time
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.
DDR, LPDDR, GDDR, HBM, eMMC, logic synthesis, physical design, timing, DRC/LVS, Formal verification, Design-For-Test, DFT
2mo
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Principal RTL Design
Boise, Idaho, United States
OnsiteFull Time
8+ YOEMaster's EE with 8+ years or Bachelor's EE with 10+ years RTL/pre-silicon design; ownership of complex RTL/IP, low-power ASIC methodologies (UPF), Verilog/SystemVerilog, STA, synthesis, CDC/RDC experience.
Verilog, SystemVerilog, UPF, CDC, RDC, STA, lint, synthesis