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ASIC/FPGA Design Engineer III
Denver or Highlands Ranch or Sunnyvale or Cambridge
$101k-$201k/yr OnsiteFull Time
3+ YOEUS citizen able to obtain DoD Secret clearance, BS in Electrical Engineering (or equivalent), 3+ years professional FPGA development, HDL experience (VHDL/Verilog/SystemVerilog), and experience across ASIC/FPGA lifecycle.
VHDL, Verilog, SystemVerilog, Linux, AMD/Xilinx Vivado, Microchip Libero, Microsoft Project, JIRA, Earned Value Management System (EVMS)
2w
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Senior ASIC Digital / DSP Design Engineer
Colorado Springs, Colorado, United States
$142k-$236k/yr OnsiteFull Time
10+ YOEBS/MS in Electrical or Computer Engineering, 10+ years experience in digital and mixed-signal ASIC and DSP design/verification; strong EE and DSP fundamentals; leadership and communication skills.
Cadence, Mentor
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ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yr RemoteFull Time
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
Cadence Sigrity, Ansys HFSS, Keysight ADS, Cadence APD, Ansys EM, SPICE, Vector Network Analysis, IBIS
1d
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Hardware Engineer
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$91k-$113k/yr OnsiteFull Time
Early-career candidates pursuing or recently completing an engineering degree; familiarity with hardware, firmware, ASIC/SoC, or systems; programming and design experience through coursework or projects; strong analytical and communication skills.
Verilog/SystemVerilog, RTL, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, Git, Linux, IDE, CAD, Microsoft Office, RTOS
1d
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Senior Digital Signal Processing (DSP) Engineer
Englewood, Colorado, United States
$130k-$185k/yr OnsiteFull Time
10+ YOEBSEE with 10+ years experience (MSEE preferred). Deep DSP knowledge, RF comms, ADC/DAC, MATLAB prototyping, C/C++ modeling, Verilog/VHDL FPGA/ASIC implementation, mentoring experience, US citizenship.
MATLAB, C, C++, Verilog, VHDL, FPGA, ASIC
2w
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Space Electrical Chief Engineer
Englewood, Colorado, United States
$141k-$252k/yr OnsiteFull Time
13+ YOEExtensive spacecraft electrical experience (system architecture, power, avionics, EEE parts), ability to obtain DoD clearance, 13+ years engineering experience (or equivalent), leadership of multidisciplinary teams, requirements and test oversight.
DOORS, SpaceWire, CAN, MIL STD 1553, Ethernet, FPGA, ASIC, HIL, EMC, EMI, MBSE, MIL STD 1540, MIL STD 461, NASA GEVS
3w
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Principal Electrical Engineer - Denver, CO
Denver, Colorado, United States
$130k-$209k/yr HybridFull Time
12+ YOEB.S. in Electrical Engineering, 12+ years designing complex electrical systems, system architecture experience, technical leadership and mentorship, mixed-signal/analog/digital expertise; medical device or regulated industry experience preferred.
FPGA, ASIC, HDL
3w
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SLD Avionics FPGA Engineer III - Lunar Permanence
Seattle or Denver
$120k-$183k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOEBachelor's/Master's in engineering or related field,5+ years FPGA/ASIC design and verification,RTL in Verilog/SystemVerilog/VHDL,FPGA tools and simulators,UVM/OVM testbenches,ability to travel ~10%,U.S. work authorization required.
Verilog, SystemVerilog, VHDL, Xilinx Vivado, Intel Quartus, Lattice Diamond, Radiant, Microchip Libero, ModelSim, QuestaSim, Perl, Python, Tcl, Git, SVN, AMBA, AXI, AHB, APB, IEEE 802.3, XAUI, JESD204, I2C, SPI, UVM, OVM
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Senior PC Board Design Engineer
Austin or Colorado Springs or Markham
$123k-$210k/yr OnsiteFull Time
Strong high-speed PCB layout experience, expertise with Cadence Allegro and Constraint Manager, routing for PCIe/DP/Memory/XGMI, ASIC ball-outs, stackup/impedance control, PCB manufacturing knowledge, scripting (Pearl, C, C++). Bachelors/Masters in ECE preferred.
Cadence Allegro, Allegro, Constraint Manager, Pearl, C, C++, Valor, Valor ERF, CAM350, PCIe, DP, XGMI
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