7 asic engineer jobs at 1 company in New Hampshire
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Senior Principal FPGA Design Engineer
Manchester or Totowa
OnsiteFull Time
8+ YOERequires 8+ years relevant experience with a bachelor's degree, FPGA or ASIC design, VHDL or Verilog HDL, timing analysis, high-speed interfaces, simulation, scripting, and Secret clearance eligibility.
FPGA, ASIC, VHDL, Verilog HDL, Xilinx Vivado, Intel Quartus, Altera Quartus, Modelsim, Questa, GIT, CVS, Clearcase, Subversion, Perl, Tcl, Python, SERDES, PCIe, DDR2, DDR3, DDR4, LVDS, ADC, DAC
1mo
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Principal FPGA Digital Design Engineer - Sign-on Bonus
Nashua, New Hampshire, United States
OnsiteFull Time
6+ YOESecret-clearable engineer with 6+ years FPGA/ASIC experience, VHDL/Verilog RTL coding, timing closure, lab debug, familiarity with high-speed interfaces and revision control.
VHDL, Verilog, Xilinx Vivado, Intel/Altera Quartus, ChipScope, SignalTap, ILA, Modelsim, Questa, GIT, CVS, Clearcase, Subversion, Perl, Tcl, Python, shell, Matlab, Simulink, UVM, SystemVerilog, C, C++
3mo
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Senior FPGA Design Engineer
Nashua, New Hampshire, United States
$97k-$165k/yr OnsiteFull Time
4+ YOESecret clearance (or eligibility), 4+ years relevant experience with a bachelor’s degree (less with advanced degree). FPGA/ASIC design experience, VHDL/Verilog/SystemVerilog, testbench development, timing closure, revision control, lab testing, and strong communication and debugging skills.
VHDL, Verilog HDL, SystemVerilog, GIT, CVS, Clearcase, Subversion, Matlab/Simulink, Xilinx Vivado, Intel/Altera Quartus, Modelsim/QuestaSim, Perl, Tcl, Python, shell, UVM, C/C++, ILA/chipscope/signaltap, ADC/DAC, SERDES, PCIe
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
1mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
2mo
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FAST Labs Hardware Engineering Lead
Merrimack, New Hampshire, United States
$150k-$254k/yr OnsiteFull Time
10+ YOE2+ MgmtBachelor's in engineering, 10+ years progressive hardware experience (8+ in hands-on design), 2+ years leading hardware teams, active DoD Secret clearance (must obtain Top Secret), U.S. person/citizen required, proposal and capture experience.
Model-Based Engineering, Agile, Digital Engineering, RF Systems, GPU, FPGA, ASIC, neuromorphic chips, EO/IR, LiDAR
3mo
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FPGA Design DSP Lead
Nashua or Manchester
$150k-$254k/yr OnsiteFull Time
10+ YOE10+ years experience with bachelor's degree (less with advanced degree); Secret clearance eligible; extensive FPGA/ASIC and DSP experience; VHDL/Verilog coding; Vivado/Quartus, Modelsim/Questa, timing/Cross-domain design, lab debug, mentoring, and high-speed interface knowledge.
VHDL, Verilog HDL, Xilinx Vivado/ISE, Altera Quartus, Modelsim, Questa, PCIe, SerDes, ADC/DAC, DDR3/4, GIT, CVS, Clearcase, Subversion, Tcl/Tk, UNIX/Linux shell, Matlab/Simulink, UVM, System Verilog, C/C++, Perl, Python