8 asic engineer jobs at 6 companies in New Jersey
1mo
Save
Mark Applied
Hide
ASIC/FPGA Design Engineer IV
Littleton or California or Massachusetts or New York or Colorado or Hawaii or Illinois or Maryland or Minnesota or New Jersey or Vermont or Washington or District of Columbia
$124k-$218k/yr OnsiteFull Time
5+ YOEUS citizen able to obtain and maintain DoD Secret clearance, BS in Computer/Electrical Engineering or equivalent, 5+ years professional experience, HDL experience (VHDL/Verilog/SystemVerilog), ASIC/FPGA design and verification experience, Linux proficiency.
VHDL, Verilog, SystemVerilog, Linux, Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
1w
Save
Mark Applied
Hide
Senior Engineer, Physical Design Engineering (ASIC)
Somerset County or Wilmington
$117k-$161k/yr OnsiteFull Time
5+ YOEExpertise in ASIC/SoC physical design, floorplanning, P&R, timing closure, physical verification, scripting (TCL/Python), and cross-functional collaboration; 5+ years experience preferred.
Cadence, TCL, Python
1mo
Save
Mark Applied
Hide
FPGA Engineer
New York or New Jersey or United States
RemoteFull Time
5+ YOE5–7 years FPGA/ASIC experience, DSP proficiency, RTL (VHDL/Verilog/SystemVerilog), FPGA toolchains, high-speed interfaces, MATLAB/Simulink or Python, and SoC/embedded integration experience.
VHDL, Verilog, SystemVerilog, Xilinx Vivado, Vitis, Intel Quartus, JESD204, LVDS, SERDES, MATLAB, Simulink, Python, RFSoC, Xilinx/AMD Versal, Zynq, Git, eCPRI, Ethernet
2mo
Save
Mark Applied
Hide
Senior Engineer, Digital Design Engineering
Somerset, New Jersey, United States
$127k-$175k/yr HybridFull Time
2+ YOEMaster’s degree in Electrical/Electronic/Computer Engineering or related field; 2+ years in digital design/mixed-signal verification; experience with RTL, Verilog/SystemVerilog, and ASIC/FPGA design flows.
Verilog, SystemVerilog, Cadence, Synthesis, CDC, Verifications tools
3w
Save
Mark Applied
Hide
FPGA Engineer - Control Systems
Princeton, New Jersey, United States
$150k-$235k/yr OnsiteFull Time
Experienced in FPGA/ASIC digital logic design and verification, RTL and low-latency firmware for multi-domain clock systems; familiarity with Xilinx/AMD RFSoC platforms preferred.
RTL, FPGAs, ASICs, Xilinx, AMD, RFSoC
2mo
Save
Mark Applied
Hide
Failure Analysis Engineering Manager, GPU ASIC and PCBA Debug
Secaucus, New Jersey, United States
$129k-$221k/yr OnsiteFull Time
3+ MgmtProven people manager with 3+ years management experience; deep GPU ASIC and PCBA debug and failure analysis expertise; hands-on lab experience (oscilloscopes, logic analyzers); proficient in Python and shell; Windows/Linux experience; bachelor’s degree in EE/CE or related.
Python, Shell, Windows, Linux, Oscilloscope, Logic Analyzer
1mo
Save
Mark Applied
Hide
Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
San Diego or Nashua or Austin or Totowa or California or New Hampshire or Texas or New Jersey or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree with 8+ years (or equivalent experience); eligible for Secret clearance; experience with SystemVerilog/UVM/OVM and/or VHDL, Mentor Questa or Cadence tools; FPGA/ASIC verification, test plan development, and strong communication.
SystemVerilog, UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, Matlab, Simulink
1mo
Save
Mark Applied
Hide
FPGA/Firmware Engineers in NY, NJ & PA
Liverpool or Owego or Syracuse or Moorestown or King of Prussia
$101k-$201k/yr OnsiteFull Time
5+ YOEBachelor's in STEM, 5+ years engineering experience, FPGA/ASIC/firmware experience, U.S. citizenship and ability to obtain/maintain Secret clearance, experience with VHDL/Verilog, C/C++, Python, FPGA tools and PCB tools.
C, C++, Assembly, Python, Perl, VHDL, Verilog, Altium, Cadence, Eagle, Vitis HLS, Vivado, Quartus, Git, SVN, PCIe, AXI, SPI