13 asic engineer jobs at 4 companies in Red Wing, MN
1w
Save
Mark Applied
Hide
Lead ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$177k-$187k/yr RemoteFull Time
8+ YOEBachelor's in ECE or related plus 8+ years (or Master's plus 6+ years), strong RTL/ASIC/FPGA design experience, ASIC tape-out and timing closure experience, ability to obtain DoD Secret clearance, proficiency with JIRA and Microsoft Office.
JIRA, Microsoft Office
1w
Save
Mark Applied
Hide
Senior ASIC Digital Design Engineer
Annapolis Junction or Boise or Salt Lake City or Bloomington or United States
$142k-$150k/yr RemoteFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (Master's+3 acceptable), U.S. citizenship, ability to obtain DoD Secret clearance, 5–8+ years ASIC/FPGA RTL design experience, formal verification and verification-process experience, JIRA and Microsoft Office proficiency.
JIRA, Microsoft Office, STA
2mo
Save
Mark Applied
Hide
Principal Engineer, ASIC Physical Design
Minneapolis, Minnesota, United States
OnsiteFull Time
15+ YOE15+ years ASIC physical design experience, bachelor's or master's in EE/electronics/computer architecture, production tape-outs, UPF/CPF low-power expertise, scripting in Tcl/Perl/Python, Synopsys/Cadence/Calibre experience.
Synopsys, Cadence, Calibre, Tcl, Perl, Python, UPF, CPF
3w
Save
Mark Applied
Hide
ASIC FPGA Engineer (New Hire Sign On Bonus Eligible)
Bloomington, Minnesota, United States
$114k-$121k/yr OnsiteFull Time
2+ YOEBachelor's in electrical/computer engineering (or related) plus 2 years experience (Master's with 6 months acceptable); ability to obtain DoD Secret clearance; ASIC/FPGA design and verification experience; Microsoft Office; System Verilog preferred.
Microsoft Office, System Verilog
2w
Save
Mark Applied
Hide
ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
2+ YOE2+ years IP/SoC verification experience with UVM, SystemVerilog, and Python; bachelor’s or master’s in EE/CE; strong debugging, analytical, and communication skills.
UVM, SystemVerilog, Python
2w
Save
Mark Applied
Hide
ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
2+ YOEBachelor's or Master's in EE/CE,2+ years IP/SoC verification experience, UVM constrained-random experience, strong SystemVerilog and Python skills, analytical debugging and communication skills.
UVM, SystemVerilog, Python
2mo
Save
Mark Applied
Hide
Principal Engineer, ASIC Physical Design
Minneapolis, Minnesota, United States
OnsiteFull Time
15+ YOE15+ years hands-on ASIC physical design; BA/MA in EE/ Electronics/ Computer Architecture; multiple production tape-outs; strong low-power techniques; scripting (Tcl/Perl/Python).
Synopsys, Cadence, Calibre, UPF/CPF, Tcl, Perl, Python
2mo
Save
Mark Applied
Hide
Engineer, ASIC Physical Design
Minneapolis, Minnesota, United States
$143k-$176k/yr HybridFull Time
Master's degree in Electrical or Computer Engineering; floorplanning/placement/routing; timing analysis; Cadence/Synopsys tools; Mentor IC Validator; Tcl/Cshell; design and verification collaboration.
Cadence Innovus, Cadence Tempus, Synopsys ICC2, Synopsys Fusion Compiler, Synopsys Primetime, Mentor Calibre, IC Validator, Hercules, Tcl, Cshell
5d
Save
Mark Applied
Hide
Hardware Engineer
Colorado Springs or Irvine or Longmont or Fremont or Rochester or San Jose
$91k-$113k/yr OnsiteFull Time
Early-career candidates pursuing or recently completing an engineering degree; familiarity with hardware, firmware, ASIC/SoC, or systems; programming and design experience through coursework or projects; strong analytical and communication skills.
Verilog/SystemVerilog, RTL, FPGA, C, C++, Assembly, Python, Java, Go, SQL, JavaScript, Git, Linux, IDE, CAD, Microsoft Office, RTOS
2d
Save
Mark Applied
Hide
Pre-Silicon Diagnostics Engineer
Arizona or Bloomington or Fort Collins
$106k-$243k/yr RemoteFull Time
4+ YOE4+ years experience in diagnostics/validation/firmware/embedded software for ASICs; proficiency in object-oriented programming, Python, Linux; strong debugging, networking fundamentals, and communication skills.
Python, Linux, UVM, Verilog, SystemVerilog
2d
Save
Mark Applied
Hide
Pre-Silicon Diagnostics Engineer
Arizona or Bloomington or Fort Collins
$106k-$243k/yr RemoteFull Time
4+ YOEDevelop diagnostics and emulator-based validation for ASICs, proficient in Python,OOP,Linux,knowledge of high-speed networking;4+ years experience;strong written and verbal English.
Python, Linux, UVM, Verilog, SystemVerilog
2d
Save
Mark Applied
Hide
Pre-Silicon Diagnostics Engineer
Arizona or Bloomington or Fort Collins
$106k-$243k/yr RemoteFull Time
4+ YOEExperience in diagnostics/validation/firmware/embedded software for ASICs, 4+ years experience, proficiency in object-oriented programming, Python, Linux, networking fundamentals, strong debug and communication skills.
Python, Linux, UVM, Verilog, SystemVerilog
3w
Save
Mark Applied
Hide
FPGA Engineer (New Hire Bonus Eligible)
Bloomington, Minnesota, United States
$117k-$127k/yr OnsiteFull Time
2+ YOEBachelor's in ECE or related,2+ years experience (or MS+6mo),ability to obtain DoD Secret clearance (U.S. citizenship required),ASIC/FPGA design,Microchip PolarFire,UVM,SystemVerilog,EM simulation and MS Office proficiency.
Microchip PolarFire FPGAs, UVM, SystemVerilog, Microsoft Office