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68 asic engineer jobs at 14 companies in Washington

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Principal ASIC Package Design Engineer
Seattle, Washington, United States
$200k-$280k/yr OnsiteFull Time
K2 Space
K2 Space: Develops high-power satellite platforms for heavy-lift launch vehicles.
10+ YOEBachelor's in engineering, 10+ years ASIC package design experience with deep FC-BGA expertise; experience with SI/PI, thermal, substrate technologies, OSAT/vendor engagement, and EM/SI tools.
SIWave, HFSS, ADS
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1mo
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Sr Principal ASIC Design Engineer - Terawave
San Diego or California or Austin or Texas or Kent
$308k-$431k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
15+ YOEExperienced ASIC/SoC design and verification engineer with expertise in Verilog/SystemVerilog, DSP structures, ARM integration, interface protocols, FPGA flows, post-silicon bring-up; BS/MS in EE or related and 15+ years experience required.
Verilog, SystemVerilog, MATLAB, SystemC, C
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3w
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ASIC/FPGA Design Engineer IV
Littleton or California or Massachusetts or New York or Colorado or Hawaii or Illinois or Maryland or Minnesota or New Jersey or Vermont or Washington or District of Columbia
$124k-$218k/yr OnsiteFull Time
Lockheed Martin
Lockheed MartinNYSE: LMT: Designs and manufactures global security and aerospace systems.
5+ YOEUS citizen able to obtain and maintain DoD Secret clearance, BS in Computer/Electrical Engineering or equivalent, 5+ years professional experience, HDL experience (VHDL/Verilog/SystemVerilog), ASIC/FPGA design and verification experience, Linux proficiency.
VHDL, Verilog, SystemVerilog, Linux, Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
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Senior ASIC Verification Engineer
Santa Clara or Austin or Washington or Oregon or California
$136k-$265k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOEBS/MS in EE/ECE or equivalent, 5+ years verification experience, strong logic design knowledge, expertise in System Verilog/UVM/Formal, scripting (Perl/Python), C++, and pre-silicon test plan implementation.
System Verilog, UVM, C++, Perl, Python, X prop, Formal Verification, NVIDIA custom compilers and tools, DFT, IST
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Manager, ASIC Sustaining engineer, Silicon Operations
Sunnyvale or Bellevue or San Diego
$175k-$272k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
5+ YOE5+ Mgmt5+ years technical program management and people management experience; Bachelors in engineering/CS; experience with Unix/Linux, yield improvement, root cause and failure analysis, DOE, and partnering with process/equipment/design teams.
Unix, Linux, AWS, Agile
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3w
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ASIC Technical Lead- DFT
San Jose or New York City or New York or Washington or Illinois or United States or Canada
$211k-$305k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
10+ YOEBachelor's or Master's in Electrical/Computer Engineering with 10+ years experience; expertise in JTAG, scan and BIST architectures, ATPG and EDA toolsets (TestMax, Tetramax, Tessent, PrimeTime); SystemVerilog/Verilog and post-silicon debug experience.
JTAG, ATPG, TestMax, Tetramax, Tessent, PrimeTime, System Verilog, Verilog
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1w
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Associate ASIC and/or FPGA Design and Verification Engineer
Tukwila, Washington, United States
$99k-$133k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designing and manufacturing commercial aircraft and defense systems.
2+ YOEUS-person requirement with ability to obtain U.S. Secret clearance; Bachelor's in engineering or related field; 2+ years ASIC/FPGA design or verification experience; SystemVerilog, hardware integration, and scripting experience.
SystemVerilog, System Verilog Assertions, UVM, HDL, LEC, CDC, linting, Palladium, JESD204C, PCIe, Ethernet, Make, Perl, Python, svn, cvs, git, Linux
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1mo
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FPGA/ASIC Design Engineer (Silicon Engineering)
Irvine or Redmond
$125k-$145k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
1+ YOEBachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
Verilog/SystemVerilog, VHDL, Python, C/C++, Bash, HDL simulators, Spyglass, Vivado, Quartus, AXI/APB/AHB protocols
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1w
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Associate ASIC and/or FPGA Design and Verification Engineer
Tukwila, Washington, United States
$99k-$133k/yr OnsiteFull Time
Boeing
BoeingNYSE: BA: Designs and manufactures aircraft, defense systems, and space technology.
2+ YOEUS-person requirement for security clearance, BS in related field, experience with ASIC/FPGA design and verification using SystemVerilog, hardware integration/testing, and scripting; typically 2+ years.
SystemVerilog, System Verilog Assertions, PalladiumPro, HDL, JESD204C, PCIe, Ethernet, Make, Perl, Python, svn, cvs, git, Linux
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2mo
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Electrical Engineer
Vancouver, Washington, United States
$93k-$144k/yr OnsiteFull Time
HP
HPNYSE: HPQ: Produces personal computers, printers, and related digital imaging products.
4+ YOEDesigns electrical hardware, FPGA/ASIC, Verilog/VHDL, debugging, testing, leadership of project teams.
FPGA, Verilog, VHDL, C++, Electrical Engineering
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Senior Digital Design Engineer
Santa Clara or Austin or Redmond
$136k-$265k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOE5+ years experience in digital/ASIC design, degree in EE/CE or equivalent, experience with high-speed protocols (NVLink, PCI-Express, Ethernet, UCIE), RTL implementation, and ASIC design flows.
NVLink, PCI-Express, Ethernet, UCIE, RTL
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Principal Silicon Design Verification Engineer
Santa Clara or Mountain View or Hillsboro or Austin or Redmond
$143k-$275k/yr HybridFull Time
Microsoft
MicrosoftNASDAQ: MSFT: Develops software, services, devices, and cloud computing solutions.
3+ YOEDegree in EE/CE/CS (or equivalent) with 3+ to 8+ years technical engineering experience depending on degree, experience in ASIC/SoC verification, UVM/SystemVerilog/Verilog and C proficiency, ability to pass Microsoft security screening.
UVM, C, Verilog, System Verilog
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2mo
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Physical Design Engineer
Austin or Boulder or Chicago or London or New York City or Seattle
$200k-$300k/yr OnsiteFull Time
Hudson River Trading
Hudson River Trading: A quantitative firm using technology to trade global financial markets.
Experience in high-performance ASIC design; digital logic; DFT concepts; scripting (Python, Tcl, shell); static timing analysis; timing closure; Innovus/PrimeTime.
Innovus, PrimeTime, Python, Tcl, shell
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2mo
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Senior Electrical Engineer, Radiation Effects & Avionics Reliability
Seattle, Washington, United States
$150k-$200k/yr OnsiteFull Time
Cowboy Space
Cowboy Space: Building satellite-based orbital infrastructure for AI data centers.
4+ YOEBachelor’s in Electrical Engineering; 4+ years in radiation effects, avionics reliability, or high-reliability electronics; hands-on radiation testing; experience with FMEA/FMECA, FTA, derating; knowledge of FPGA/ASIC/power systems; able to translate test data into design decisions.
FPGAs, ASICs, Power electronics, COTS, Radiation test equipment, SPENVIS, OMERE, NOVICE
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1w
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Integrated Circuit Design Verification Engineer
Vancouver, Washington, United States
$173k-$259k/yr OnsiteFull Time
Snap
SnapNYSE: SNAP: Provides visual messaging software and augmented reality wearable devices.
10+ YOE10+ years ASIC design verification experience; strong UVM/SystemVerilog skills; Siemens Questa; develop UVM/assertion testbenches, functional and code coverage, scripting/automation in Linux.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
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Cloud Acceleration Engineer – DPU & AI Infra
Seattle, Washington, United States
OnsiteFull Time
ByteDance
ByteDance: Developing AI-driven content platforms and mobile applications.
2+ YOE2+ years industry experience (PhD exception), proficiency in C/C++ and Linux systems, strong understanding of compute/network architecture and OS, experience in software-hardware co-design or high-performance networking or AI/ML systems.
C/C++, Linux, OVS, SR-IOV, eBPF, DPDK, FPGA, ASIC, GPU, CUDA, NCCL
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2mo
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Performance Modeling Lead
San Francisco or Seattle
$342k-$555k/yr HybridFull Time
OpenAI
OpenAI: Develops artificial intelligence models and generative AI software services.
2+ YOE2+ MgmtLead a small team to build performance modeling frameworks; analyze system-level tradeoffs across AI infrastructure; influence design decisions.
Performance modeling, Analytical modeling, Simulation, HPC, GPU, ASIC
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