2mo
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ASIC & FPGA Design Engineer Sr
Orlando, Florida, United States
$101k-$178k/yr HybridFull Time
3+ YOEB.S. in EE or related, 3+ years FPGA design experience, proficiency in VHDL/Verilog/SystemVerilog, Vivado/Vitis toolsets, Synopsys VCS, experience with high-speed interfaces, lab debug skills, US citizenship and ability to obtain DoD Secret clearance.
VHDL, Verilog, SystemVerilog, UVM, SystemC, Python, GitLab, Vivado, Vitis, Vitis HLS, Synopsys VCS, Synopsys Synplify, NCSim, ChipScope, MATLAB/Simulink, HDL Coder, C, C++, tcpdump, Wireshark
2mo
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ASIC & FPGA Design Engineer Stf
Orlando or Florida
$124k-$246k/yr RemoteFull Time
8+ YOEU.S. citizen able to obtain Secret clearance; associate degree or higher in EE/microelectronics; 8+ years full-custom analog/mixed-signal IC layout across 130nm–12nm (including BCD); proficiency with Synopsys Custom Compiler and Cadence Virtuoso; physical verification closure experience.
Synopsys Custom Compiler, Synopsys Custom Designer, Cadence Virtuoso, SKILL, Tcl, Python, Perl, EMIR, DRC, LVS, ERC, ANT
2mo
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SLD FPGA Verification Engineer III - Lunar Permanence
Seattle or Space Coast
$131k-$183k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOEBS/MS in Electrical or Computer Engineering; 5+ years FPGA/ASIC verification; RTL simulation tools; UVM; testbench development; DO-254 knowledge a plus.
QuestaSim, ModelSim, SystemVerilog, UVM, RTL, DO-254
3d
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Sr. Specialist, Electrical Engineer - FPGA 1 (41949)
Palm Bay, Florida, United States
OnsiteFull Time
6+ YOEExperience designing, implementing, and verifying FPGA/ASIC for wireless communications; bachelor's (or equivalent) with 6+ years or 10+ years' experience; VHDL and DSP experience; secret security clearance required.
Vivado, Quartus, MatLab, Simulink, VHDL, BERTS
2mo
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Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)
Nashua or Manchester or Largo or New Hampshire or Florida or United States
$130k-$222k/yr OnsiteFull Time
8+ YOEBachelor's degree (or equivalent) with 8+ years experience; ability to obtain Secret clearance; expertise in SystemVerilog/UVM, OVM, VHDL, FPGA/ASIC verification and tools; experience with Mentor Questa or Cadence; strong communication and leadership.
SystemVerilog/UVM, OVM, VHDL, Mentor Questa, Cadence, Perl, Python, C++, Java, Git, Jira, BitBucket, MATLAB, Simulink
6d
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Aircraft Structural Dynamics Engineer
Wichita or Tucson or Opa-locka or Fort Worth or Windsor
OnsiteFull Time
15+ YOEUniversity engineering degree, 15+ years technical experience (10+ in aeronautics), 5+ years FPGA/ASIC or embedded software, knowledge of airborne software/hardware standards, DOORS/JAMA experience, C/C++/Ada95/Assembly/Python, OIQ membership preferred.
DOORS, JAMA, C, C++, Ada95, Assembly, Python