Lockheed MartinNYSE: LMT: Designs and manufactures global security and aerospace systems.
3+ YOEBachelor's in EE or related (Master's preferred); 3+ years FPGA design and verification experience; proficiency in VHDL/Verilog/SystemVerilog, FPGA toolsets (Vivado/Vitis), simulation (Synopsys VCS), GitLab; U.S. citizenship and ability to obtain DoD Secret clearance.
ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yrRemoteFull Time
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
15+ YOEBachelor's in EE or related, 15+ years semiconductor experience with program/product development, ASIC/mixed-signal PM experience, strong technical, analytical and communication skills, ability to lead cross-functional teams.
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
0+ YOEBachelor's or Master’s in EE/CE, 0–3 years experience or internship in ASIC/SoC/DFT, familiarity with digital design and synthesizable RTL (SystemVerilog/Verilog), and ability to support DFT implementation, validation, and debug.
GlobalFoundriesNASDAQ: GFS: Manufacturer of semiconductors and provider of wafer fabrication services.
Proven track record delivering complex semiconductor products; expertise in system architecture for ASICs/SoCs/MCUs; processor, memory, interconnect and security knowledge; cross-functional leadership and customer-facing skills; bachelor\u0002s degree required.
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
5+ YOEBachelor's/Master's in EE/CE or equivalent, strong digital design and DFT fundamentals (scan, MBIST, JTAG), RTL experience (SystemVerilog/VHDL), familiarity with semiconductor test flows, and 5+ years DRAM or ASIC DFT design/verification experience.